MIPI-CSI2

Hello

i am using mach03L evaluation board with 1 lane,
the clock do not present any error,
but i get syncpt timeout error .

q1: is this may be becuase MIPI calibration does not take place ?
q2: must it do mipi calibration ?
q3: the lattice produce the clock and data signal and dmesg show no error, but only syncpt error. How to debug next ?
q4: the i2c is removed in the driver.
q5: it is RAW 14 format, is it always considered as 24 bytes ?
q6: is i2c is essential part, or i can preconfig directly the vi2.c file with the constant resolution and size ?
q7: what would be the very minimum values to set the vi2.c to run and image , without i2c ?

Thank you

Segev

Hi segen
The MIPI calibration and i2c were not the key point. But if your sensor not stream on after the xxx_s_stream() that may have timing issue. It’s better to verify the raw10 first. For the RAW14 you need to modify vi2 driver to support it like below. It should print some CSI status if syncpt timeout.(check the vi2_capture_error_status)

image_size = icd->user_width * 10 /8;

Thank you very much, are you sure that for the raw 14 it is 10/8 and not 14/8 ?

Segev

Sorry it’s my bad. It should be the 14 not 10.

image_size = icd->user_width * 14 /8;

when i do yavta i get 0x55 content (no error but syncpt)

i ment syncpt timout, can you sugget why we do not see a picture ?

Segev

we now directing the debug counters and we see the line PPA packet counter zero,
is this because we don’t have syncpt ?

we do not have any other error reported.

Segev

Hi
The “CSI_x syncpt timeout” means CSI didn’t receive the frame from the bus. That could be the MIPI single/timing cause the problem.

But we do see the DEBUG_COUNTER increasing when set to show PPA frame start and PPA Frame ends
when you note MIPI Single/Timing , you mean the hardware ?
or the interpretation of the Width Height or byte_per_line, image_size paramters setting ?

Thank you,

Segev

Hello,

We do see now green image
when on TEGRA_CSI_PIXEL_STREAM_A_CONTROL0 we place
SHORT_FRAMES_PAD_ZEROS we see green
on
SHORT_FRAMES_PAD_ONES we see ping
frame on camorama advances , and no error reported. on timing or such.

So
q1: why we don’t see the pattern generated image ?
q2: how can we know by scope or register or other wise what to place in WIDTH and HEIGHT to please the tegra_camera , image_size, and bye_per_location.

Segev

Hello,

it started to work , we see parital image,

the MIPI-CSI interface has a minimum bit rate ?
can we transmit 8MBit/seconds in the hight speed mode ?

Thank you,

Segev

Hello,

Why there are video surface 0 1and 2 , is this holds the rgb respectively ?

Segev

Could you description more detail. Not really understand your question.
And for the MIPI each lane is 1.5G you can calculate it.

The am you,

It works , we evtually used rgb888

Segev.

Hello,

what means the bus_id below ?

is it relate to video0 if bus_id is 0 and video1 is bus_id is 1 ?

static struct soc_camera_link ov5693_e3326_iclink = {
.bus_id = 0, /* This must match the .id of tegra_vi01_device */
.board_info = &t210ref_ov5693_e3326_camera_i2c_device,
.module_name = “ov5693_v4l2”,

We are looking to run two cameras , one to be video 0 and the other to be video1
how do we set it ?

Segev

Hi segev
I don’t know the bus_id is for what purpose, but from the soc_camera.c the function soc_camera_video_start() call the video_register_device(icd->vdev, VFL_TYPE_GRABBER, -1) means set the video node as first free.

Could you confirm you are develop your project on TK1 with r21.5 ?

the Linux version is 3.10.40

what is r21.5 refers too ? is it JetPack ?

I followed the r24.2 documentation .

Thank you,

Segev

So how do two camera gets enumerated for /dev/video0 and /dev/video1 ?

should I do it on the board-ardbeg-sensors.c ?

must I configure the tree for this ?

Segev

Hi segev
For the TK1 you shoud do it on the board-ardbeg-sensors.c