problematic clock
Hello, I should the following error to be handled? [code][ 3.727587] tegra-snd-t186ref-mobile-rt565x sound: Can't retrieve clk clk_m [ 3.727661] tegra-snd-t186ref-mobile-rt565x: probe of sound failed with error -2 [/code] thanks.
Hello,

I should the following error to be handled?

[    3.727587] tegra-snd-t186ref-mobile-rt565x sound: Can't retrieve clk clk_m
[ 3.727661] tegra-snd-t186ref-mobile-rt565x: probe of sound failed with error -2


thanks.

#1
Posted 12/28/2017 12:44 PM   
Hi igal.kroyter, Which L4T version you used on your TX2? R28.1 or R28.2 DP? How to get the error you mentioned? Please elaborate the step to get that log. Thanks
Hi igal.kroyter,

Which L4T version you used on your TX2? R28.1 or R28.2 DP?
How to get the error you mentioned?
Please elaborate the step to get that log.

Thanks

#2
Posted 12/29/2017 12:21 AM   
Hi kayccc, I am using the TX2 with R28.1. This is the the sound card definition which I utilize: [code] sound { compatible = "nvidia,tegra-audio-t186ref-mobile-rt565x"; nvidia,model = "tegra-snd-t186ref-mobile-rt565x"; status = "okay"; nvidia,clk-rates = <0x10266000 0xac4400 0x2b11000 0x2b11000 0xea60000 0xbb8000 0x2ee0000 0x2ee0000>; nvidia,num-clk = <0x8>; clock-names = "pll_a", "pll_a_out0", "ahub", "clk_m", "extern1"; nvidia,xbar = <0xce>; nvidia,audio-routing = "Headphone-z", "HPL", "Headphone-z", "HPR", "Headphone-z", "LOL", "Headphone-z", "LOR","IN1_L", "LineIn-z", "IN1_R", "LineIn-z","IN2_L", "LineIn-z", "IN2_R", "LineIn-z","IN3_L", "LineIn-z", "IN3_R", "LineIn-z"; nvidia,num-codec-link = <0x2>; nvidia,dai-link-1 { link-name = "ti-capture-z"; cpu-dai = <0xcf>; codec-dai = <&aic32x4>; cpu-dai-name = "I2S1"; codec-dai-name = "tlv320aic32x4-hifi"; tx-mask = <0xFF>; rx-mask = <0xFF>; format = "i2s"; bitclock-slave; frame-slave; bitclock-noninversion; frame-noninversion; bit-format = "s16_le"; bclk_ratio = <1>; srate = <48000>; num-channel = <2>; name-prefix = "z"; }; nvidia,dai-link-2 { link-name = "ti-playback-x"; cpu-dai = <0xcf>; codec-dai = <&aic32x4>; cpu-dai-name = "I2S1"; codec-dai-name = "tlv320aic32x4-hifi"; tx-mask = <0xFF>; rx-mask = <0xFF>; format = "i2s"; bitclock-slave; frame-slave; bitclock-noninversion; frame-noninversion; bit-format = "s16_le"; bclk_ratio = <1>; srate = <48000>; num-channel = <2>; name-prefix = "x"; }; }; [/code] and this is the i2c driver that I utilize: [code] i2c@c240000 { reg = <0x0 0xc240000 0x0 0x100>; dmas = <0x19 0x16 0x19 0x16>; interrupts = <0x0 0x1a 0x4>; compatible = "nvidia,tegra186-i2c"; clock-names = "div-clk", "parent", "slow-clk"; reset-names = "i2c"; clock-frequency = <0x61a80>; scl-gpio = <0x1c 0x30 0x0>; sda-gpio = <0x1c 0x31 0x0>; clocks = <0xd 0xda 0xd 0x10d 0xd 0xdd>; resets = <0xd 0x14>; status = "okay"; #address-cells = <0x1>; phandle = <0x8b>; #stream-id-cells = <0x1>; #size-cells = <0x0>; dma-names = "rx", "tx"; linux,phandle = <0x8b>; ..... [b] aic32x4: tlv320aic32x4.1-0018@18 { compatible = "ti,tlv320aic32x4"; status = "okay"; reg = <0x18>; //clocks = <&clks 201>; clock-names = "mclk"; }; ...... [/b] }; [/code] I understand that the function that fails is from within: [i]int tegra_alt_asoc_utils_init(struct tegra_asoc_audio_clock_info *data,struct device *dev, struct snd_soc_card *card)[/i] function ; from tegra_asoc_utils_alt.c file: [code] ... data->clk_m = devm_clk_get(dev, "clk_m"); if (IS_ERR(data->clk_m)) { dev_err(data->dev, "Can't retrieve clk clk_m\n"); ret = PTR_ERR(data->clk_m); goto err; } ... [/code] any suggestions?
Hi kayccc,

I am using the TX2 with R28.1.

This is the the sound card definition which I utilize:

sound {
compatible = "nvidia,tegra-audio-t186ref-mobile-rt565x";
nvidia,model = "tegra-snd-t186ref-mobile-rt565x";
status = "okay";
nvidia,clk-rates = <0x10266000 0xac4400 0x2b11000 0x2b11000 0xea60000 0xbb8000 0x2ee0000 0x2ee0000>;
nvidia,num-clk = <0x8>;
clock-names = "pll_a", "pll_a_out0", "ahub", "clk_m", "extern1";
nvidia,xbar = <0xce>;
nvidia,audio-routing = "Headphone-z", "HPL", "Headphone-z", "HPR", "Headphone-z", "LOL", "Headphone-z", "LOR","IN1_L", "LineIn-z", "IN1_R", "LineIn-z","IN2_L", "LineIn-z", "IN2_R", "LineIn-z","IN3_L", "LineIn-z", "IN3_R", "LineIn-z";
nvidia,num-codec-link = <0x2>;
nvidia,dai-link-1 {
link-name = "ti-capture-z";
cpu-dai = <0xcf>;
codec-dai = <&aic32x4>;
cpu-dai-name = "I2S1";
codec-dai-name = "tlv320aic32x4-hifi";
tx-mask = <0xFF>;
rx-mask = <0xFF>;
format = "i2s";
bitclock-slave;
frame-slave;
bitclock-noninversion;
frame-noninversion;
bit-format = "s16_le";
bclk_ratio = <1>;
srate = <48000>;
num-channel = <2>;
name-prefix = "z";
};

nvidia,dai-link-2 {
link-name = "ti-playback-x";
cpu-dai = <0xcf>;
codec-dai = <&aic32x4>;
cpu-dai-name = "I2S1";
codec-dai-name = "tlv320aic32x4-hifi";
tx-mask = <0xFF>;
rx-mask = <0xFF>;
format = "i2s";
bitclock-slave;
frame-slave;
bitclock-noninversion;
frame-noninversion;
bit-format = "s16_le";
bclk_ratio = <1>;
srate = <48000>;
num-channel = <2>;
name-prefix = "x";
};
};


and this is the i2c driver that I utilize:
i2c@c240000 {
reg = <0x0 0xc240000 0x0 0x100>;
dmas = <0x19 0x16 0x19 0x16>;
interrupts = <0x0 0x1a 0x4>;
compatible = "nvidia,tegra186-i2c";
clock-names = "div-clk", "parent", "slow-clk";
reset-names = "i2c";
clock-frequency = <0x61a80>;
scl-gpio = <0x1c 0x30 0x0>;
sda-gpio = <0x1c 0x31 0x0>;
clocks = <0xd 0xda 0xd 0x10d 0xd 0xdd>;
resets = <0xd 0x14>;
status = "okay";
#address-cells = <0x1>;
phandle = <0x8b>;
#stream-id-cells = <0x1>;
#size-cells = <0x0>;
dma-names = "rx", "tx";
linux,phandle = <0x8b>;
.....
aic32x4: tlv320aic32x4.1-0018@18 {
compatible = "ti,tlv320aic32x4";
status = "okay";
reg = <0x18>;
//clocks = <&clks 201>;
clock-names = "mclk";
};
......

};


I understand that the function that fails is from within:
int tegra_alt_asoc_utils_init(struct tegra_asoc_audio_clock_info *data,struct device *dev, struct snd_soc_card *card) function ; from tegra_asoc_utils_alt.c file:

...
data->clk_m = devm_clk_get(dev, "clk_m");
if (IS_ERR(data->clk_m)) {
dev_err(data->dev, "Can't retrieve clk clk_m\n");
ret = PTR_ERR(data->clk_m);
goto err;
}
...


any suggestions?

#3
Posted 12/31/2017 06:24 AM   
Not sure is it cause by lost the clocks statement like below. [code] tegra_sound: sound { compatible = "nvidia,tegra-audio-t186ref-mobile-rt565x"; nvidia,model = "tegra-snd-t186ref-mobile-rt565x"; nvidia,num-codec-link = <13>; nvidia,num-clk = <8>; nvidia,clk-rates = < 270950400 /* PLLA_x11025_RATE */ 11289600 /* AUD_MCLK_x11025_RATE */ 45158400 /* PLLA_OUT0_x11025_RATE */ 45158400 /* AHUB_x11025_RATE */ 245760000 /* PLLA_x8000_RATE */ 12288000 /* AUD_MCLK_x8000_RATE */ 49152000 /* PLLA_OUT0_x8000_RATE */ 49152000 >;/* AHUB_x8000_RATE */ clocks = <&tegra_car TEGRA186_CLK_PLLP_OUT0>, <&tegra_car TEGRA186_CLK_PLLA>, <&tegra_car TEGRA186_CLK_PLL_A_OUT0>, <&tegra_car TEGRA186_CLK_AHUB>, <&tegra_car TEGRA186_CLK_CLK_M>, <&tegra_car TEGRA186_CLK_AUD_MCLK>; clock-names = "pll_p_out1", "pll_a", "pll_a_out0", "ahub", "clk_m", "extern1"; resets = <&tegra_car TEGRA186_RESET_AUD_MCLK>; reset-names = "extern1_rst"; [/code]
Not sure is it cause by lost the clocks statement like below.

tegra_sound: sound {
compatible = "nvidia,tegra-audio-t186ref-mobile-rt565x";
nvidia,model = "tegra-snd-t186ref-mobile-rt565x";
nvidia,num-codec-link = <13>;
nvidia,num-clk = <8>;
nvidia,clk-rates = < 270950400 /* PLLA_x11025_RATE */
11289600 /* AUD_MCLK_x11025_RATE */
45158400 /* PLLA_OUT0_x11025_RATE */
45158400 /* AHUB_x11025_RATE */
245760000 /* PLLA_x8000_RATE */
12288000 /* AUD_MCLK_x8000_RATE */
49152000 /* PLLA_OUT0_x8000_RATE */
49152000 >;/* AHUB_x8000_RATE */
clocks = <&tegra_car TEGRA186_CLK_PLLP_OUT0>,
<&tegra_car TEGRA186_CLK_PLLA>,
<&tegra_car TEGRA186_CLK_PLL_A_OUT0>,
<&tegra_car TEGRA186_CLK_AHUB>,
<&tegra_car TEGRA186_CLK_CLK_M>,
<&tegra_car TEGRA186_CLK_AUD_MCLK>;
clock-names = "pll_p_out1", "pll_a", "pll_a_out0", "ahub",
"clk_m", "extern1";
resets = <&tegra_car TEGRA186_RESET_AUD_MCLK>;
reset-names = "extern1_rst";

#4
Posted 01/02/2018 05:28 AM   
ShaneCCC, When trying to compile the tree, I get that the [code]clocks = <&tegra_car TEGRA186_CLK_PLLP_OUT0>,[/code] is syntax error. Moreover, the [b]resets [/b]token also produces a [b]syntax error[/b]. do you know the reason? Thanks.
ShaneCCC,
When trying to compile the tree, I get that the
clocks = <&tegra_car TEGRA186_CLK_PLLP_OUT0>,

is syntax error.
Moreover, the resets token also produces a syntax error.

do you know the reason?

Thanks.

#5
Posted 01/02/2018 07:10 AM   
Those declaration were in the ../hardware/nvidia/platform/t18x/common/kernel-dts/t18x-platforms/tegra186-quill-common.dtsi file shouldn't have compile issue.
Those declaration were in the ../hardware/nvidia/platform/t18x/common/kernel-dts/t18x-platforms/tegra186-quill-common.dtsi file shouldn't have compile issue.

#6
Posted 01/02/2018 07:29 AM   
I have searched the whole drive where I installed the Jetpack and could not find this file ([b]tegra186-quill-common.dtsi[/b]) did I miss some installation?
I have searched the whole drive where I installed the Jetpack and could not find this file (tegra186-quill-common.dtsi) did I miss some installation?

#7
Posted 01/02/2018 07:50 AM   
Please ignore my previous message (#7)... how should then this file be included in the compilation environment? thanks.
Please ignore my previous message (#7)...

how should then this file be included in the compilation environment?
thanks.

#8
Posted 01/02/2018 07:51 AM   
This file should default include.
This file should default include.

#9
Posted 01/02/2018 08:02 AM   
until now was compiling the DT on a remote machine and flashing it remotely. So I though that it is possible that not all dependent TDs are included so I have followed the procedure to compile the device tree on the target machine (Jetson TX2) per [url]https://devtalk.nvidia.com/default/topic/1023007/jetson-tx2/how-to-use-uart0-as-normal-uart-port-on-r28-1-/post/5206235/[/url] and again I have a syntax error that pointing [i]8021.36-37[/i], I guess it is where the [b]TEGRA186_CLK_PLLP_OUT0[/b] is. any suggestions?
until now was compiling the DT on a remote machine and flashing it remotely. So I though that it is possible that not all dependent TDs are included so I have followed the procedure to compile the device tree on the target machine (Jetson TX2) per https://devtalk.nvidia.com/default/topic/1023007/jetson-tx2/how-to-use-uart0-as-normal-uart-port-on-r28-1-/post/5206235/

and again I have a syntax error that pointing 8021.36-37, I guess it is where the TEGRA186_CLK_PLLP_OUT0 is.

any suggestions?

#10
Posted 01/02/2018 08:30 AM   
until now was compiling the DT on a remote machine and flashing it remotely. So I though that it is possible that not all dependent TDs are included so I have followed the procedure to compile the device tree on the target machine (Jetson TX2) per [url]https://devtalk.nvidia.com/default/topic/1023007/jetson-tx2/how-to-use-uart0-as-normal-uart-port-on-r28-1-/post/5206235/[/url] and again I have a syntax error that pointing [i]8021.36-37[/i], I guess it is where the [b]TEGRA186_CLK_PLLP_OUT0[/b] is. any suggestions?
until now was compiling the DT on a remote machine and flashing it remotely. So I though that it is possible that not all dependent TDs are included so I have followed the procedure to compile the device tree on the target machine (Jetson TX2) per https://devtalk.nvidia.com/default/topic/1023007/jetson-tx2/how-to-use-uart0-as-normal-uart-port-on-r28-1-/post/5206235/

and again I have a syntax error that pointing 8021.36-37, I guess it is where the TEGRA186_CLK_PLLP_OUT0 is.

any suggestions?

#11
Posted 01/02/2018 08:35 AM   
If you follow the l4t-document chapter "Kernel Customization" to sync and build the DT and kernel image that shouldn't have this problem.
If you follow the l4t-document chapter "Kernel Customization" to sync and build the DT and kernel image that shouldn't have this problem.

#12
Posted 01/02/2018 08:41 AM   
I'm sorry but I could not find anything there that explains how to compile a device tree. What should I find in the L4T documents?
I'm sorry but I could not find anything there that explains how to compile a device tree.
What should I find in the L4T documents?

#13
Posted 01/02/2018 09:25 AM   
Go to download center to find it. https://developer.nvidia.com/embedded/downloads
Go to download center to find it.


https://developer.nvidia.com/embedded/downloads

#14
Posted 01/02/2018 09:33 AM   
My bad. I was not clear enough, I was reading the L4T document, but I could not find a procedure for compiling a device tree and then flashing. I have found these procedures in the current forum. I guess that there are device tree source files which [b]#include[/b] the common [b]dts [/b]files. but I am not aware of such a procedure. I am actually de-compile the current device tree modify it and compile it again, and I assume that this is an incorrect procedure. Please advise.
My bad. I was not clear enough, I was reading the L4T document, but I could not find a procedure for compiling a device tree and then flashing. I have found these procedures in the current forum. I guess that there are device tree source files which #include the common dts files. but I am not aware of such a procedure.
I am actually de-compile the current device tree modify it and compile it again, and I assume that this is an incorrect procedure.

Please advise.

#15
Posted 01/02/2018 09:38 AM   
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