Dear NVIDIA,
I’m writing to you because we’re trying to develop a driver for the switch on board of PX2.
The reason why we are developing the driver is because the original suite does not include communication via TSN.
TSN is a protocol suite that could permit to make a Time Triggered communication between PX2 and other devices on the vehicle.
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We are able to sinchronize final nodes (the 2 parkers for istance) but we’re not able to sinchornize via PTP the internal clock of the switch. Could you give us a solution about this problem?
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The driver must configure the PX2 switch in order to support scheduled traffic (IEEE 802.1Qbv) but at the moment, available API doesn’t permit us to use Qbv. Could you help us to enable this feature?
Best regards
Giancarlo
Dear giancarlo.vasta,
For #1, Please refer to below link.
https://devtalk.nvidia.com/default/topic/1031778/faq/nvidia_drive_px2_time_sync_guide/
For #2, Coudl you please file a bug for this request?
Please login to https://developer.nvidia.com/drive with your credentials.
Please check MyAccount->MyBugs->Submit a new bug to file bug.
Please share ID here to follow up. Thanks.
Dear Steve,
thank you for your answer but the topic in the link talks about the synchonization problem between Parker and Aurix. In particularly the topic says that Aurix is the master and the 2 Parkers are the slaves and they synchronized theirself on Aurix clock.
We have the opposite situation: we have Parker A as master, Parker B and Aurix are slaves.
In every case, the topic doesn’t take care of the synchronizazion problem for Marvell switch on PTP frame that is the principal problem that we must resolve.
Please, help us to solve this problem.
For #2 I’m going to open a nVbug
Best regards
Giancarlo
Dear giancarlo.vasta,
Well noted it’s quite the opposite case. I think you need to register a bug in this case. Thanks.