Hi.
We have a problem on testing ‘aurix_tegra_can’ which is included in DPX2-P2379-EB-V4.02.02_release.zip.
To test working of above binary, we set below things.
- Copy ‘aurix_tegra_can’ source code and makefile to the target.
- Type ‘make’ to compile source code. (it is well-compiled on the target.)
- Connect CAN1 ~ CAN6 on vehicle connector to the 3 PCAN devices (2 channels per each PCAN device).
- Set PCAN devices’ baudrate as 500Kbps with extended id format.
- Each PCAN device sends a message with unique MsgID to the PX2.
After set up above settings, we’ve executed ‘aurix_tegra_can’ on TegraA.
However, any CAN Msg does not appear on PCAN or PX2 side.
‘aurix_tegra_can’ on TegraA is prompting only pdu info without CAN Msg info.
Moreover, PCAN-Viewer does not show any received message from PX2.
So, we have tested ‘aurix_tegra_can_send_receive.py’ which is in the same zip file.
In this case, PX2 send a single message to the PCAN device and we can see it.
So, I think that our HW setup is not wrong…
How can I test ‘aurix_tegra_can’?
Thank you.
Dear tiger0219,
Could you please refer to below link for your topic? Thanks.
DRIVE PX2 TIME SYNC GUIDE
https://devtalk.nvidia.com/default/topic/1031778/faq/drive-px2-time-sync-guide/
DRIVE PX2 EASYCAN SETUP GUIDE
Thank you for providing the above references…they would have been hard to find on my own.
However, we have the same problem after applying both of the references.
When we executed ‘LINUX_LXTHREADSX86_DrivePxApp.elf’ on tegra-A, CAN-4 and CAN-6 on Vehicle connector sends CAN message 0x7AD, 0x7AF respectively with period 1000msec.
We could see them on the PCAN side.
When we executed ‘aurix_tegra_can’ again, it still does not send any message to PCAN and does not receive any message from PCAN side.
What we want to test/learn from ‘aurix_tegra_can’ is more about the simultaneous use of multiple CAN channels.
That is, we want to implement some simple thread which uses multiple (may be more than 3) CAN channels.
So, this sample code is very important for us.
NOTE :
We are not focusing on interpreting CAN message.
It is enough that just receiving/sending n-byte payload from/to PCAN.
As far as I know, ‘aurix_tegra_can’ does not use the ‘DrivePxApp.conf’ and ‘EasyCanConfigFile.conf’ files.
(I’ve copied them to /etc/eb by the way…)
Could you provide more detail support about testing ‘aurix_tegra_can’ example ?
Thank you.
Dear tiger0219,
Could you file a bug for your topic with detail description. We will look into it.
Please login to https://developer.nvidia.com/drive with your credentials. Please check MyAccount->MyBugs->Submit a new bug to file bug.
Please share ID here to follow up. Thanks.
I think that making my question be more concrete will be helpful for both of us.
So, I attach a simple test scenario that we are targeting now.
-
As far as we understand, PX2 AutoChauffeur has 6 CAN channels on Vehicle connector.
CAN1 through CAN4 on Aurix TC297, CAN5 for TegraA, CAN6 for TegraB.
-
We want to see the feasibility of below test scenario.
We have a thread T which is made for test.
T receives signals through CAN1 ~ CAN6 from the PCAN.
T echos the received signals.
T sends the received signal (echo with different mid) to the each channel where the each signal is received.
-
We will run T1 on TegraA.
And, we expect that ‘aurix_tegra_can’ sample is quite helpful for our testing scenario.
NOTE:
When we modified ‘aurix_tegra_can_send_receive.py’, we could send CAN messages at each channel (CAN1 ~ CAN6).
We saw its working on PCAN-View.
But, this python module also have the similar problem with ‘aurix_tegra_can’.
It did not receive any CAN Message from the PCAN side.
Hello,
I tried to follow your instructions in the EASYCAN SETUP GUIDE https://devtalk.nvidia.com/default/topic/1032296/faq/drivepx2-easycan-setup-guide/. Unfortunately it didnt work as described/expected. Following happened:
-
It was hard to find the files mentioned. A description of the file path would be great (for future guides)
-
when I tried to run LINUX_LXTHREADSX86_DrivePxApp.elf I got the response ‘no rights’. Note: I was logged in in console as root!
After the third time I tried it following was put out on console:
EB-DrivePX-Tegra
SW Version: DPX-EB-Tegra-0.12
Compilation date: Nov 8 2017, 23:03:01
Copyright 1998-2017 Elektrobit Automotive GmbH
DrivePxApp Demo for GNU/Linux
DsCom: Starting DataReceiverThread for DsComIpcTest.
DsCom: Starting DataReceiverThread for DsComMsgR.
SpiClient: Rx: 0 Tx: 0
EthClient: Rx: 0 Tx: 0
MsgR: Rx: 0 Tx: 2
bind failed: address already in use
EthClient: Starting DataReceiverThread.
Afterwards many lines of
Error: EthClient not initialized
appeared. In between there were some lines of
DsCom: Rx: 0 Tx: 0
and
SpiClient: Rx: 0 Tx: 0
EthClient: Rx: 0 Tx: 0
MsgR: Rx: 0 Tx: 2186
- When I tried to run :/sample_driveworks_logger --driver=can.aurix --params=ip=10.42.0.146,bus=a
I receive the error:
SensorFactory::createSensor()-> can.aurix, ip=10.42.0.146,bus=a
EndpointUDP: cannot bind 0.0.0.0:60395 -> 10.42.0.146:50000
DriveWorks Exception thrown: DW_HAL_CANNOT_OPEN_CHANNEL: EndpointUDP: cannot bind socket to remote
Additional information:
DriveWorks version: 5.0.5.0L
Aurix firmware version 4.02.02.00
We attached details at the below link.
Please refer below link.
Dear manfred.famula,
Did you run below step? if not, please try below bold part first and re-try it. Thanks.
Step 5: Enter CTRL-C to stop DrivePxApp and enter the following command to start DriveWorks canbus logger
root@nvidia:/home/nvidia/driveworks/bin# ./sample_canbus_logger --driver=can.aurix --params=ip=10.42.0.146,bus=a
Dear SteveNV,
I tried as you asked and ran the two guides you mentioned above again. When I re-tried the sample_canbus_logger with --driver=can.aurix --params=ip=10.42.0.146,bus=a the following was printed out on console:
...
SensorFactory::createSensor() -> can.aurix, ip=10.42.0.146,bus=a
Cannot setup message filters: DW_NOT_IMPLEMENTED
EndpointUDP: started 10.42.0.146:50000
AurixCAN: lost clock sync between Aurix and Tegra clock. Tegra clock is ahead of Aurix clock by at least 787 msec.
The delay increased more and more the longer I ran the sample.
Should I execute
sudo ./ptp4l -f ./gPTP.cfg -p /dev/ptp0 -i eth0.200 -s -m -D -l 7
for a longer time?
I haven’t connected any physical CAN device on CAN-1 but I think, thats not the problem right now.
Regards,
Manfred
Hello,
I retried the command
sudo ./ptp4l -f ./gPTP.cfg -p /dev/ptp0 -i eth0.200 -s -m -D -l 7
for a longer time.
After it finished I ran sample_canbus_logger again and this time Tegra clock was behind Aurix clock. I stopped the sample waited for some time and tried it ones more. Tegra clock was still behind Aurix clock and the delay got even bigger (more than a second).
According to this it seems to me that Tegra and Aurix definitely don’t keep in sync and also run on different clock frequencies.
Question is: How can this issue be resolved (if possible) ?
Dear NVIDIA (SteveNV)
We have already submitted our bug report (ID = 2103064) and attached some illustrative docs.
However, we did not receive any response.
Could you please let me know how long it would take to give us the response ?
Thank you !
Dear manfred.famula,
How far is the clock drift at your PX2 ?
Dear SteveNV,
I ran
sudo ./ptp4l -f ./gPTP.cfg -p /dev/ptp0 -i eth0.200 -s -m -D -l 7
for roundabout 10 minutes.
checking time with
sudo ./phc_ctl /dev/ptp0 get
the system clock was around 4 sec. behind the Unix Epoch Clock Website https://www.epochconverter.com/clock
starting
./smple_canbus_logger --driver=can.aurix --params=ip=10.42.0.146,bus=a
Tegra was at least 1100 msec behind Aurix. After 5 minutes of running the sample, Tegra was around 3800 msec behind Aurix with the delay steadily increasing
Dear SteveNV,
do you have any ideas/plans on how to solve the clock drift issue?
I’m asking, because there was no answer for nearly a week. And we wold like to develop further on this topic.
Or should I file a bug?
Regards,
Manfred
Dear manfred.famula,
Could you please help to file a bug for this topic? Thanks.
Hello SteveNV,
I filed the issue as a bug with ID 2108249.
Regards,
Manfred
manfred.famula
Has nvidia made any progress with you on this issue?
I wonder if every single person trying to use the Aurix is encountering this issue. It has brought my company’s development on the Drive platform to a standstill.
Hi Steve,
Is there any update on this issue? I am currently having a similar clock drift issue dealing with the aurix/tegra.
Dear cfergus1,
We are still checking now. Will update it. Thanks.