TX2i: Configuration #3

Hi,

Is there a way to get a list of operations to be applied on device tree files in order to configure a TX2i device to configuration #3, so the following lanes will be supported, I have followed the instructions in “Platform Adaptation and Bring-Up Guide” with very little success.

I have modified the following attached files:

  • /usr/src/hardware/nvidia/platform/t18x/common/kernel-dts/t18x-common-plugin-manager/tegra186-quill-p3489-1000-a00-plugin-manager.dtsi
  • /usr/src/hardware/nvidia/platform/t18x/quill/kernel-dts/tegra186-quill-p3489-1000-a00-00-base.dts

I have also modified the file p2441-0000.conf.common on the Jetpack (which resides on a remote PC station) with the ODMDATA=0x6090000 (it was ODMDATA=0x1090000). I did not use -o 0x6090000 during flashing (assuming that the file modification is good enough).

I have also attached the log.

Thanks.

tegra186-quill-p3489-1000-a00-plugin-manager.dtsi.txt (9.36 KB)
tegra186-quill-p3489-1000-a00-00-base.dts.txt (5.99 KB)

igal.kroyter,

We have not yet dealt with much TX2i adaptation problems. Please share your dmesg with us.

WayneWWW, thanks for the reply.

I’ve attached the log.

Thanks.
dmesg.txt (75.3 KB)

WayneWWW,

I have run the configuration from scratch per https://elinux.org/Jetson/TX2_USB.

I got the following dmesg (I have allowed myself to leave only PCIe related messages, while the full dmesg is attached).

...
[    0.264811] GPIO line 459 (pcie-lane2-mux) hogged as output/low
...
[    0.267923] iommu: Adding device 10003000.pcie-controller to group 50
...
[    0.396411] PCI: CLS 0 bytes, default 128
...
[    7.266237] tegra-pcie 10003000.pcie-controller: 4x1, 1x1 configuration
[    7.281317] tegra-pcie 10003000.pcie-controller: PCIE: Enable power rails
...
[    7.314508] tegra-pcie 10003000.pcie-controller: probing port 0, using 4 lanes
[    7.316801] tegra-pcie 10003000.pcie-controller: probing port 1, using 0 lanes
[    7.318970] tegra-pcie 10003000.pcie-controller: probing port 2, using 1 lanes
...
[    7.748316] tegra-pcie 10003000.pcie-controller: link 0 down, retrying
...
[    8.152592] tegra-pcie 10003000.pcie-controller: link 0 down, retrying
...
[    8.568612] tegra-pcie 10003000.pcie-controller: link 0 down, retrying
[    8.570626] tegra-pcie 10003000.pcie-controller: link 0 down, ignoring
...
[    8.977796] tegra-pcie 10003000.pcie-controller: link 1 down, retrying
...
[    9.450008] tegra-pcie 10003000.pcie-controller: link 1 down, retrying
...
[    9.861598] tegra-pcie 10003000.pcie-controller: link 1 down, retrying
[    9.862612] tegra-pcie 10003000.pcie-controller: link 1 down, ignoring
...
[   10.254679] tegra-pcie 10003000.pcie-controller: link 2 down, retrying
...
[   10.644380] tegra-pcie 10003000.pcie-controller: link 2 down, retrying
...
[   11.040477] tegra-pcie 10003000.pcie-controller: link 2 down, retrying
[   11.042494] tegra-pcie 10003000.pcie-controller: link 2 down, ignoring
[   11.042500] tegra-pcie 10003000.pcie-controller: PCIE: no end points detected
[   11.042833] tegra-pcie 10003000.pcie-controller: PCIE: Disable power rails
...

I have also attached the de-compiled dtb file which is used to flash the Jetson: tegra186-quill-p3489-1000-a00-00-ucm1.dts

Thanks.
tegra186-quill-p3489-1000-a00-00-ucm1.dts.txt (364 KB)
dmesg.txt (62.2 KB)

WayneWWW, hi,

I had to modify the file /usr/src/hardware/nvidia/platform/t18x/common/kernel-dts/t18x-common-plugin-manager/tegra186-quill-p3489-1000-a00-plugin-manager.dtsi, specifically the override@9 which includes a pci lanes overlay. Once I have updated it I could see in the configuration:

[    7.266237] tegra-pcie 10003000.pcie-controller: 1x1, 1x1, 1x1 configuration
[    7.281317] tegra-pcie 10003000.pcie-controller: PCIE: Enable power rails
...
[    7.314508] tegra-pcie 10003000.pcie-controller: probing port 0, using 1 lanes
[    7.316801] tegra-pcie 10003000.pcie-controller: probing port 1, using 1 lanes
[    7.318970] tegra-pcie 10003000.pcie-controller: probing port 2, using 1 lanes

Though I cannot see any devices on the PCIe ports.

when I probe the memory, I get the folowing

sudo devmem2 0x02520284 b => 0 (XUSB - LANE0 PEX1)
sudo devmem2 0x02530284 b => 1 (PCIe - LANE1 PEX_RFU)
sudo devmem2 0x02540284 b => 1 (PCIe - LANE2 USB_SS1)
sudo devmem2 0x02550284 b => 1 (PCIe - LANE3 PEX2)
sudo devmem2 0x02560284 b => 1 (PCIe - LANE4 PEX0)
sudo devmem2 0x02570284 b => 2 (SATA - LANE5 USB_SS0)

while I was expecting:

sudo devmem2 0x02520284 b => 1 (PCIe - LANE0 PEX1)
sudo devmem2 0x02530284 b => 0 (XUSB - LANE1 PEX_RFU)
sudo devmem2 0x02540284 b => 0 (XUSB - LANE2 USB_SS1)
sudo devmem2 0x02550284 b => 1 (PCIe - LANE3 PEX2)
sudo devmem2 0x02560284 b => 1 (PCIe - LANE4 PEX0)
sudo devmem2 0x02570284 b => 2 (SATA - LANE5 USB_SS0)

Moreover I see no clock during boot from PEX1 reference clock.

Any support will be appreciated.

igal.kroyter,

Is changing the ODMdata not working? The value from 0x025x0284 is based on the odmdata in flash config.

Wayne, hi,

I attached the p2771-0000.conf.common file and the device tree file. This is how I flash the /home/nvidia/jetpack/64_TX2/Linux_for_Tegra/kernel/dtb/tegra186-quill-p3489-1000-a00-00-ucm1.dtb which supposed to be my modified device tree:

sudo ./flash.sh -o 0x6090000 -r -k kernel-dtb jetson-tx2i mmcblk0p1

So I think that I have provided the ODMDATA everywhere I could, except the bpmp* files (which I do not know what they are).
So:

  1. Is my flashing procedure is correct and will affect the ODMDATA?
  2. Is my assumption regarding the values of 0x025x0284 correct?

Thanks.

p2771-0000.conf.common.txt (8.35 KB)
tegra186-quill-p3489-1000-a00-00-ucm1.dtb.txt (267 KB)

Not sure if below line affects the result, could you also modify value here?

elif [ "${bid}" \= "3489" ]; then
		ODMDATA=0x1090000;

WayneWWW, hi,

I have modified the value and no change in the memory reading, moreover I have set the value outsize the “if” clause - no results. The file is attached.

Any ideas?
p2771-0000.conf.common.txt (8.44 KB)

igal.kroyter,

Another way for checking is going to /proc/device-tree/chosen/plugin-manager/odm-data.

Could you share the result with us?

WayneWWW,

ls -l /proc/device-tree/chosen/plugin-manager/odm-data
total 0
-r--r--r-- 1 root root 4 Aug 30 03:51 android-build
-r--r--r-- 1 root root 4 Aug 30 03:51 disable-pmic-wdt
-r--r--r-- 1 root root 4 Aug 30 03:51 disable-sdmmc-hwcq
-r--r--r-- 1 root root 4 Aug 30 03:51 disable-tegra-wdt
-r--r--r-- 1 root root 4 Aug 30 03:51 enable-debug-console
-r--r--r-- 1 root root 4 Aug 30 03:51 enable-denver-wdt
-r--r--r-- 1 root root 4 Aug 30 03:51 enable-pcie-on-uphy-lane1
-r--r--r-- 1 root root 4 Aug 30 03:51 enable-pcie-on-uphy-lane2
-r--r--r-- 1 root root 4 Aug 30 03:51 enable-pcie-on-uphy-lane4
-r--r--r-- 1 root root 4 Aug 30 03:51 enable-sata-on-uphy-lane5
-r--r--r-- 1 root root 4 Aug 30 03:51 enable-xusb-on-uphy-lane0
-r--r--r-- 1 root root 9 Aug 30 03:51 name
-r--r--r-- 1 root root 4 Aug 30 03:51 no-battery
-r--r--r-- 1 root root 4 Aug 30 03:51 normal-flashed

BTW, I have added an echo function and verified that ODMDATA=0x6090000 when completing the function process_board_version in the p2771-0000.conf.common file.

Regards.

igal.kroyter,

Looks like it does not change at all. Let me check what is going on there.

Sorry for inconvenience.

Could you try to flash the board without using any parameter in flash command?
Also, use your own odmdata in config.

sudo ./flash.sh jetson-tx2i mmcblk0p1

devmem2 reads out correct/expected value on my tx2i after modified the below field in flash config.

I doubt the “-k kernel-dtb” parameter affects the result. Please try.

120         elif [ "${bid}" \= "3489" ]; then
121               <b>  ODMDATA=0x6090000;</b>
122                 tofab="-a00";
123                 pmicfab="-a00";
124                 bpfdtbfab="-a00";
125                 tbcdtbfab="-a00";
126                 kerndtbfab="-a00";
127                 if [ "${bdv}" \< "300" ]; then
128                         bpfdtbfab="-evt";

WaynWWW, hi,

I hope that I understood you correctly, this is the way that I’ve run the flashing:

sudo ./flash.sh jetson-tx2i mmcblk0p1

and this is the result of the device tree, whic is missing the PEX2 lane3:

<b>ls -l /proc/device-tree/chosen/plugin-manager/odm-data</b>
total 0
-r--r--r-- 1 root root 4 Sep  2 06:57 android-build
-r--r--r-- 1 root root 4 Sep  2 06:57 disable-pmic-wdt
-r--r--r-- 1 root root 4 Sep  2 06:57 disable-sdmmc-hwcq
-r--r--r-- 1 root root 4 Sep  2 06:57 disable-tegra-wdt
-r--r--r-- 1 root root 4 Sep  2 06:57 enable-debug-console
-r--r--r-- 1 root root 4 Sep  2 06:57 enable-denver-wdt
-r--r--r-- 1 root root 4 Sep  2 06:57 enable-pcie-on-uphy-lane0
-r--r--r-- 1 root root 4 Sep  2 06:57 enable-pcie-on-uphy-lane4
-r--r--r-- 1 root root 4 Sep  2 06:57 enable-sata-on-uphy-lane5
-r--r--r-- 1 root root 4 Sep  2 06:57 enable-xusb-on-uphy-lane1
-r--r--r-- 1 root root 4 Sep  2 06:57 enable-xusb-on-uphy-lane2
-r--r--r-- 1 root root 9 Sep  2 06:57 name
-r--r--r-- 1 root root 4 Sep  2 06:57 no-battery
-r--r--r-- 1 root root 4 Sep  2 06:57 normal-flashed

Questions:

  1. Why lane 3 is missing, although I can identify a device (with lspci) on this lane (PEX2)?
  2. Why a device connected to lane0 (PEX1) is not identified?
  3. Is there a way to make this operation faster and without erasing the whole eMMC on the TX2i?

Regards.

Please use devmem2 to check the odmdata is correct or not. plugin-manager is just a check point I want to see in above debug process.

If odmdata, device-tree and odm data is correct, we need to do further debug for the device.

WayneWWW, hi,

It seems like the memory dump is OK:

sudo devmem2 0x02520284 b => 1 (PCIe - LANE0 PEX1)
sudo devmem2 0x02530284 b => 0 (XUSB - LANE1 PEX_RFU)
sudo devmem2 0x02540284 b => 0 (XUSB - LANE2 USB_SS1)
sudo devmem2 0x02550284 b => 1 (PCIe - LANE3 PEX2)
sudo devmem2 0x02560284 b => 1 (PCIe - LANE4 PEX0)
sudo devmem2 0x02570284 b => 2 (SATA - LANE5 USB_SS0)

Though, there is a correlation issue with the

/proc/device-tree/chosen/plugin-manager/odm-data

And I cannot identify a device on lane 0 (PEX1).

Regards.

igal.kroyter,

Your odm-data in plugin-manager is correct, because PEX2 lane 3 is always pcie. It is not configurable.

Is your device working fine on lane 3 or lane 4?

Have you checked our wiki page?
https://elinux.org/Jetson/TX2_USB

Please make sure “pcie0_lane2_mux” is set.

WayneWWW, hi,

the programming command

sudo ./flash.sh -o 0x6090000 jetson-tx2i mmcblk0p1

that you suggested an a HW line impedance modification enabled us to identify all required PCIe devices.

Thanks.