My L4T version is R28.2.0. At present we use configuration #2 in the USB lane mapping and I want to change to the configuration# 4, which support more usb3 port.
It seems there are two files need to be changed in the path /usr/src/hardware/nvidia/platform/t18x/quill/kernel-dts/
tegra186-quill-p3310-1000-a00-00-base.dts
and
tegra186-quill-p3310-1000-c03-00-base.dts
I am really confused about the variable’s name in .dts file and the relations of c03 file and a00 file
Here is the changed part in my
tegra186-quill-p3310-1000-c03-00-base.dts
gpio@2200000 {
sdmmc-wake-support-input {
status = "okay";
};
sdmmc-wake-support-output {
status = "okay";
};
/*pcie0_lane2_mux {
status = "okay"; //This is for switch from usb3.0 to x1 PCIe on M.2.
};*/
};
pcie-controller@10003000 {
pci@1,0 {
// nvidia,num-lanes = <4>;
nvidia,num-lanes = <1>;
nvidia,disable-clock-request;
status = "okay";
};
pci@2,0 {
// nvidia,num-lanes = <0>;
nvidia,num-lanes = <1>;
status = "okay";
};
pci@3,0 {
nvidia,num-lanes = <1>;
status = "disabled";
};
};
xhci@3530000 {
// phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>,
// <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)>,
// <&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(0)>;
// phy-names = "utmi-0", "utmi-1", "usb3-0";
phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(0)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(1)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(2)>;
phy-names = "utmi-0", "utmi-1", "usb3-0", "usb3-1", "usb3-2"';
};
pinctrl@3520000 {
pinmux {
usb3-std-A-port2 {
nvidia,lanes = "usb3-1";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
status = "okay";
};
usb3-std-A-port3 {
nvidia,lanes = "usb3-2";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
status = "okay";
};
e3325-usb3-std-A-SS {
nvidia,lanes = "usb3-0";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
status = "okay";
};
/*e3325-usb3-std-A-HS {
status = "okay"; //This is usb2.0 port on M.2
};*/
};
};
Here is the changed part in my
tegra186-quill-p3310-1000-a00-00-base.dts
file after change
xhci@3530000 {
status = "okay";
// phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>,
// <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)>,
// <&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(1)>;
// phy-names = "utmi-0", "utmi-1", "usb3-1";
phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(0)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(1)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(2)>;
phy-names = "utmi-0", "utmi-1", "usb-0", "usb3-1", "usb3-2";
nvidia,boost_cpu_freq = <800>;
};
pinctrl@3520000 {
status = "okay";
pinctrl-0 = <&tegra_xusb_padctl_pinmux_default>;
pinctrl-1 = <&vbus_en0_sfio_tristate_state>;
pinctrl-2 = <&vbus_en1_sfio_tristate_state>;
pinctrl-3 = <&vbus_en0_sfio_passthrough_state>;
pinctrl-4 = <&vbus_en1_sfio_passthrough_state>;
pinctrl-5 = <&vbus_en0_default_state>;
pinctrl-6 = <&vbus_en1_default_state>;
pinctrl-names = "default",
"vbus_en0_sfio_tristate", "vbus_en1_sfio_tristate",
"vbus_en0_sfio_passthrough", "vbus_en1_sfio_passthrough",
"vbus_en0_default", "vbus_en1_default";
tegra_xusb_padctl_pinmux_default: pinmux {
/* Quill does not support usb3-micro AB */
usb2-micro-AB {
nvidia,lanes = "otg-0";
nvidia,function = "xusb";
nvidia,port-cap = <TEGRA_PADCTL_PORT_OTG_CAP>;
nvidia,oc-pin = <0>;
};
usb2-std-A-port2 {
nvidia,lanes = "otg-1";
nvidia,function = "xusb";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
nvidia,oc-pin = <1>;
};
usb3-std-A-port2 {
nvidia,lanes = "usb3-1";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
nvidia,oc-pin = <1>;
};
usb3-std-A-port3 {
nvidia,lanes = "usb3-2";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
nvidia,oc-pin = <1>;
};
e3325-usb3-std-A-HS {
nvidia,lanes = "otg-2";
nvidia,function = "xusb";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
status = "disabled";
};
e3325-usb3-std-A-SS {
nvidia,lanes = "usb3-0";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
// status = "disabled";
status = "okay";
};
};
};
pcie-controller@10003000 {
status = "okay";
pci@1,0 {
// nvidia,num-lanes = <4>;
nvidia,num-lanes = <1>;
nvidia,disable-clock-request;
status = "okay";
};
pci@2,0 {
nvidia,num-lanes = <1>;
status = "disabled";
};
pci@3,0 {
nvidia,num-lanes = <1>;
status = "disabled";
};
};
Btw, I have already commented out the “fragment-500-pcie-config”, “fragment-500-xusb-config” and “fragment-500-e3325-pcie” in
/usr/src/hardware/nvidia/platform/t18x/common/kernel-dts/t18x-common-plugin-manager/tegra186-quill-p3310-1000-a00-plugin-manager.dtsi
and changed the vbus-2-supply = <&vdd_usb2_5v> to vbus-2-supply = <&battery_reg> in
/usr/src/hardware/nvidia/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-quill-power-tree-p3310-1000-a00-00.dtsi
Appreciate anyone can help me with it. I’m just so confused now.
Thanks