how to deactivate built-in pull-up/-down resistor on GPIO

Autonomous Machines Jetson & Embedded Systems Jetson AGX Xavier
1

Hello nVidia,
As title said, the GPIO behave other then the GPIOs of a raspberry Pi here.I suppose this is caused by the built-in pull-up/-down resisotrs.

I would like to access these GPIOs through carrierboard’s 40-pol pinheader (J30)
Pin “MCLK05” (“gpio422”,pin number 7 of Expansion Header) is one of my choice used as input. through file system interface (/sys/class/gpio/gpio422/export) I can export this pin dynamically, change its direction and read its value without issue. But later I figured out it’s not as easy as a proper configured GPIO of a Raspberry pi to pull-down.

In one of my test, I’m using a external 1K Ohm pull-down resistor for this gpio,and its still too big for its purpose (875 Ohm works).

Later I discovered, with a MCU controlled MOSFET, I can not bring this pin to 3.3V (3.3V is selected through J514),but with the same setup I can toggle a GPIO from a pi.

I’m pretty sure there is no damage of the Xavier Devkit from very beginning. (ESD protected, J514 selected properly, Working voltage for GPIOs never go over 3.3V).So I would like to deactivate the built-in resistor firstly.

There are two possible ways to achive this:
Edit Xavier’s dtb file or edit memory block directely. I prefer the later one. But its still not clear how to calculate the memory address for this gpio, and what kind of value should I set.Counld someone give me some advice?

2

hello Gfast2,

had you tried to configure the GPIO via sysnode, you may refer to
Tegra Linux Driver Package TX2 Adaptation Guide for GPIO number calculation.
thanks

3

Thank you for your quick reply! We have now found the address 0x02430030:

Bank: 0 Reg: 0x02430030 Val: 0x0000005a → soc_gpio42_pq6

(in /sys/kernel/debug/tegra_pinctrl_reg)

As Val is listed 0x0000005a.

Is that a bitmask?
How are those values calculated?
What do we need to change the value to so that the pullup/pulldown is deactivated?

4

It’s bitmap as below.

0x0000000002430030: PADCTL_CAM_SOC_GPIO42_0                                 = 0x00000474 //
          E_SCHMT                                                 = 0x00000000 // [12:12] DISABLE [DISABLE=0,ENABLE=1]
          GPIO_SF_SEL                                             = 0x00000001 // [10:10] SFIO [GPIO=0,SFIO=1]
          E_LPDR                                                  = 0x00000000 // [08:08] DISABLE [DISABLE=0,ENABLE=1]
          E_INPUT                                                 = 0x00000001 // [06:06] ENABLE [DISABLE=0,ENABLE=1]
          E_IO_HV                                                 = 0x00000001 // [05:05] ENABLE [DISABLE=0,ENABLE=1]
          TRISTATE                                                = 0x00000001 // [04:04] TRISTATE [PASSTHROUGH=0,TRISTATE=1]
          PUPD                                                    = 0x00000001 // [03:02] PULL_DOWN [NONE=0,PULL_DOWN=1,PULL_UP=2,RSVD=3]
          PM                                                      = 0x00000000 // [01:00] VGP3 [EXTPERIPH4=1,RSVD2=2,RSVD3=3,VGP3=0]
5

Thanks ShaneCCC,

I’ve successfully configured the value in those memory blocks according to your bit mask table. It’s pretty cool.

When I hange nothing on pin 7 from 40-pol pinheader (gpio422, MCLK05), I can read “1” from

cat /sys/class/gpio/gpio422/value

As default, “0x0000005a” is set for this pin. Acoording to your table, I figured out, the built-in Pull-Up resistor is activated. After I change this value to “0x00000478”

sudo busybox devmem 0x02430030 32 0x00000478

I cat read “0” from that file system address.

I think I know how to change Pull-Up/-Down Resistor now.

But I can still not toggle this GPIO with my own testbed. Which is controlled by a µM and GPIO is toggled by a MOSFET. But with a physical switch I can always switch this GPIO much more realiable.
Any tip for debugging/improving my Testbed?

Thanks a lot!

Su

6

To summarize, we want to configure MCLK05 resp. GPIO 422 of the Xavier so that it works just as the Raspberry Pi 3 GPIO 4 (same pin header position 7 on both Xavier and RPi3). What value do we need to write to 0x02430030 so that it is 100% compatible with RPi3?

7

I don’t know how the RPi3 working. However set it as default 0x5a should working as GPIO normally.