I’m developing a board based on Jetson TK1 with a video decoder that uses MIPI CSI-2 interface. The idea is to capture video from HDMI to process on board. I’ve got a Jetson now with a Raspberry Pi camera hooked up as best as I could based on some old information from posts from the days when CSI didn’t apparaently work (mid-late 2014). I’ve hooked up the CSI lanes to CSI A, 3.3V to 3.3V_SYS, camera’s poweron to jetson’s GPIO57 and I2C to GEN2-I2C which should correspond to i2c1 port. Some people seem to connect 3.3V i2c to CAM_I2C but these lines are pulled up to 1.8V on the jetson side. Anyone can clarify here? Seems like pins are 3V3-tolerant but jetson isn’t because of these pullups.
The Jetson has L4T 21.3 with latest grinch kernel and I seem to be able to powerup the camera (set GPIO 57 to 1 and camera regulators start running) but i2cdetect says no device is detected on i2c1. I’ll scope the signals and see what’s going on as soon as I can.
If I try to start gstreamer or Cheese after modprbing tegra_camera the board hangs and I have to hard-reset it. I suppose that’s normal because the camera is not configured. I would want to get the raspberry pi camera running as an example to understand how video4linux camera drivers work so then I could implement the driver for the HDMI capture IC. I’ve written device-tree based ALSA drivers for audio codec’s on other platforms where you get the platform’s audio interface driver (for example I2S, equivalent to MIPI CSI2 here) and you have to write the specific codec driver and a third “glue” driver for your specific board. Is it similar on v4l2?
You need a level converter. The Jetson is unlikely to be damaged from 3.3V but it is also unlikely to communicate since it is putting out 1.8V. If you build your own tegra k1 board you could skip this and just pull up to the 3.3V rail.
Are all available sensor drivers (like for example sony imx153) “hardcoded” to use CAM-I2C (as it’s the CCI part of the MIPI specification) or can I route the control through GEN2 I2C via for example device tree binding? I’m not yet familiarized with how L4T’s kernel is structured/organized.
A lot of that I can’t answer. It does come in two general categories though…partly you simply need to worry about the schematic/hardware, and which I/O is available to the general use headers. See this page and look for Jetson TK1 Development Platform Schematics:
[url]https://developer.nvidia.com/hardware-design-and-development[/url]
Most I/O which routes to J3A1/J3A2 is “soft coded” via either the standard linux kernel firmware files (the DTS files which compile into DTB), or via a driver itself, often with control being selectable under /sysfs. Because most I/O in the tegra K1 has options to be used in multiple ways, you’ll find that sysfs access tends to make consistent setup moderately painless. In the case where a driver has been coded to do something particular, things get a lot more complicated to free up that resource to use it for something else. The Tegra K1 Technical Reference Manual is also found on that same download URL and shows required setup for particular controllers and their I/O pins.
hi Marcos
May I know how to connect Jetson csi-2 with a Raspberry Pi camera ? Since the Jetson csi-2 interface is 4 lane but Raspberry Pi camera CSI-2 is 2 lane. I am tring to use Raspberry Pi camera on TK1 NOW, So, I am confusing about this.
I think you just connect the lanes jetson’s CSI-A lanes (the main CSI interface has CSI-A and CSI-B, 2 lanes each and 4 lanes combined). The problem here is the software…
hi,
I am also trying to interface CSI signals(1 lane data and 1 lane clock) to jetson which is having grinch kernel. what are the driver modifications i need to do in the jetson kernel.Weather grinch kernel by default support CSI inputs? How to configure the various parameters like lane configuration ,color format etc? Can anybody help??
Hi chuang,
Thanks for the reply.
I am not having an imx135 sensor.I am feeding the CSI 2 data using an FPGA. I referred the V4L2 user guide and added the driver support for imx135 and modified the code such a way that the I2C calls got bypassed.After module loading ,it is registering the video device as /dev/video0. The FPGA is sending in SRGGB10 640x480 format.
I am using yavta for capturing a frame ,but the image is invalid. dmesg is giving status of TEGRA_CSI_CSI_CIL_A_STATUS as 0x00000012 ,
TEGRA_CSI_CSI_CILA_STATUS as 0x00040061 and
TEGRA_CSI_CSI_CIL_A_STATUS as 0x00000010
I am not familiar with CSI .From TRM ,these status indicates Transmission Multibit error,Sync error etc.