Hello,
We have developed a new board based on the Jetson design. The memory chips are different because we couldn’t source the hynix. Is there an easier way to generate the BCT files than manually? I see that all BCT files contains a comment that says that is generated with a tool. How can we get this tool ?
I’m not positive, but I don’t think those are “free” tools. You could ask here and mention specific memory to see if something could be made available:
[url]https://developer.nvidia.com/contact[/url]
In the end of the day you’d need to perform memory characterization in order to generate optimized BCT. See “Tegra K1 Memory Characterization” in the end of this page: Hardware Design and Development | NVIDIA Developer
Meanwhile you could probably use one of the already available BCTs
Which memory part number did you use ? how many chips and total size ?
Are you copy the same layout and topology as Jetson reference design ?
We use this chips MT41K256M16HA-125. We layed them the same as the Hynix. Board is very similar except we put 2 usb ports and drop some other ports.
https://drive.google.com/open?id=0B9JDdk5z6XBEYW5BTlBQT1RsQXc
I put the config file for MT41K256M16HA on the above link, it is for 2GB config
It contain 4 files, 300MHz, 528MHz, 792MHz and the DVFS table.
You could try the 792MHz first, try the lower frequency if 792MHz fail to boot up
Hello
Thanks for the files. Where should I put the DVFS table ?
When I tried it it gives an error while flashing.
sudo ./flash.sh xyz-edge mmcblk0p1
copying bctfile(/mnt/xyz/Linux_for_Tegra/bootloader/ardbeg/BCT/PM358_Micron_MID_2GB_MT41K256M16HA_528MHz.cfg)... done.
copying bootloader(/mnt/xyz/Linux_for_Tegra/bootloader/ardbeg/u-boot.bin)... done.
populating kernel to rootfs... done.
populating jetson-tk1_extlinux.conf.emmc to rootfs... done.
done.
Making system.img...
populating rootfs from /mnt/xyz/Linux_for_Tegra/rootfs ... done.
Sync'ing system.img ... done.
Converting RAW image to Sparse image...
---- Raw to Sparse Image Converter v1.0 ----------------------------
0: RAW: 3710976( 906 blks) ==> 28:3710988
1: SKP: 28672( 7 blks) ==> 3711016:28684
2: RAW: 8192( 2 blks) ==> 3711028:8204
3: SKP: 57344( 14 blks) ==> 3719232:57356
4: RAW: 2605056( 636 blks) ==> 3719244:2605068
...
1757: SKP: 34574336( 8441 blks) ==> 2307895928:34574348
1758: RAW: 33554432( 8192 blks) ==> 2307895940:33554444
1759: SKP: 33554432( 8192 blks) ==> 2341450384:33554444
1760: RAW: 30801920( 7520 blks) ==> 2341450396:30801932
1761: SKP: 1915355136( 467616 blks) ==> 2372252328:1915355148
-- Total: -----------------------------------------------------------
1762 CHUNK 15032385536(3670016 blks) ==> 2372252340(579158 blks)
done.
system.img built successfully.
copying dtbfile(/mnt/xyz/Linux_for_Tegra/kernel/dtb/tegra124-jetson_tk1-pm375-000-c00-00.dtb)... done.
copying cfgfile(/mnt/xyz/Linux_for_Tegra/bootloader/ardbeg/cfg/gnu_linux_fastboot_emmc_full.cfg) to flash.cfg... done.
creating gpt(ppt.img)...
*** GPT Parameters ***
Device Sector Size ------- 512
device size -------------- 15766388736
bootpart size ------------ 8388608
userpart size ------------ 15758000128
Erase Block Size --------- 2097152
FS Buffer size ----------- 4096
Partition Config file ---- flash.cfg
Visible partition flag --- GP1
Primary GPT output ------- PPT->ppt.img
Secondary GPT output ----- GPT->gpt.img
Target device name ------- none
*** PARTITION LAYOUT(20 partitions) ***
[ BCT] BH 0 16383 8.0MiB
[ PPT] UH 0 4095 2.0MiB ppt.img
[ PT] UH 4096 8191 2.0MiB
[ EBT] UH 8192 16383 4.0MiB u-boot.bin
[ LNX] UH 16384 49151 16.0MiB
[ SOS] UH 49152 61439 6.0MiB
[ NVC] UH 61440 65535 2.0MiB
[ MPB] UH 65536 77823 6.0MiB
[ MBP] UH 77824 90111 6.0MiB
[ GP1] UH 90112 94207 2.0MiB
[ APP] UV 94208 29454335 14336.0MiB system.img
[ DTB] UV 29454336 29462527 4.0MiB tegra124-jetson_tk1-pm375-000-c00-00.dtb
[ EFI] UV 29462528 29593599 64.0MiB
[ USP] UV 29593600 29601791 4.0MiB
[ TP1] UV 29601792 29609983 4.0MiB
[ TP2] UV 29609984 29618175 4.0MiB
[ TP3] UV 29618176 29626367 4.0MiB
[ WB0] UV 29626368 29630463 2.0MiB
[ UDA] UV 29630464 30773247 558.0MiB
[ GPT] UH 30773248 30777343 2.0MiB gpt.img
copying flasher(/mnt/xyz/Linux_for_Tegra/bootloader/ardbeg/fastboot.bin)... done.
Existing flashapp(/mnt/xyz/Linux_for_Tegra/bootloader/nvflash) reused.
*** Flashing target device started. ***
./nvflash --bct PM358_Micron_MID_2GB_MT41K256M16HA_528MHz.cfg --setbct --configfile flash.cfg --create --bl fastboot.bin --odmdata 0x6009C000 --go
Nvflash 4.13.0000 started
BR_CID: 0x34001001740de0c81c00000012fb82c0
rcm version 0X400001
Skipping BoardID read at miniloader level
System Information:
chip name: unknown
chip id: 0x40 major: 1 minor: 1
chip sku: 0x0
chip uid: 0x00000001740de0c81c00000012fb82c0
macrovision: disabled
hdcp: disabled
jtag: disabled
sbk burned: false
board id: 0
warranty fuse: 0
dk burned: false
boot device: emmc
operating mode: 3
device config strap: 0
device config fuse: 0
sdram config strap: 0
RCM communication completed
BCT sent successfully
sending file: tegra124-jetson_tk1-pm375-000-c00-00.dtb
- 59637/59637 bytes sent
tegra124-jetson_tk1-pm375-000-c00-00.dtb sent successfully
odm data: 0x6009c000
downloading bootloader -- load address: 0x83d88000 entry point: 0x83d88000
download command failed NvError 0x120002
command failure/warning: bootloader download failed (bad data)
Failed flashing ardbeg.
Would you check the below topic for the error code and nvtest for SDRAM test.
Does your package install successfully on Jetson board with correct BCT ?
Hello
I tested with your program and it gives no failure. I am using L4T 21.4.
The errors come after downloading the bootloader. Here is the log
./nvflash --bct PM358_Micron_MID_2GB_MT41K256M16HA_792MHz.cfg --setbct --configfile flash.cfg --create --bl fastboot.bin --odmdata 0x6009C000 --go
Nvflash 4.13.0000 started
BR_CID: 0x34001001740de0c81c00000012fb82c0
rcm version 0X400001
Skipping BoardID read at miniloader level
System Information:
chip name: unknown
chip id: 0x40 major: 1 minor: 1
chip sku: 0x0
chip uid: 0x00000001740de0c81c00000012fb82c0
macrovision: disabled
hdcp: disabled
jtag: disabled
sbk burned: false
board id: 0
warranty fuse: 0
dk burned: false
boot device: emmc
operating mode: 3
device config strap: 0
device config fuse: 0
sdram config strap: 0
RCM communication completed
BCT sent successfully
sending file: tegra124-jetson_tk1-pm375-000-c00-00.dtb
- 59637/59637 bytes sent
tegra124-jetson_tk1-pm375-000-c00-00.dtb sent successfully
odm data: 0x6009c000
downloading bootloader -- load address: 0x83d88000 entry point: 0x83d88000
download command failed NvError 0x120002
command failure/warning: bootloader download failed (bad data)
Would you please provide the nvtest result with micron config file ? It looks like a memory issue.
Have you tried the 300MHz config file?
The 792mhz and 528Mhz tests fine. The 300Mhz hangs. Here are the log files for 792mhz:
emmc:
E:\mem\nvtest_tk1>nvhost --avp --skip-reset --chip t124 --sdram PM358_Micron_MID_2GB_MT41K256M16HA_792MHz.cfg diags_emmc.axf
nvhost: ========================================
nvhost: Found --chip parameter
nvhost: ...success! Found t124
nvhost: ========================================
nvblserver: Loading "diags_emmc.axg" via usb:...
Done.
WARNING: Ignoring auto-detect due to --chip parameter
...Now connected to target using usb
target_stdout: init sdram
target_stdout: Memory size = 0x00000400
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM test PASSED
target_stdout: enable arc
target_stdout:
target_stdout: Initializing eMMC device. Please wait...
target_stdout: If it lasted over 10s, please stop this program and check if
target_stdout: 1. eMMC device is existing.
target_stdout: 2. The connection is correct.
target_stdout: 3. Board Pinmux allows to use this device.
target_stdout: 4. PLLP is ~432MHz.
target_stdout: Done init
target_stdout:
target_stdout: !!!!! High speed mode is enabled
target_stdout:
target_stdout: Initialization is done. IdentificationTime = 15173us
target_stdout:
target_stdout: !!!!! SET BLOCK SIZE TO 512B !!!!!
target_stdout: [pass: EmmcWrRdTest]
target_stdout: ---------------
target_stdout: total subtests: 1
target_stdout: total failures: 0
target_stdout:
target_exit(0)
nvhost: QUIT
E:\mem\nvtest_tk1>pause
Press any key to continue . . .
runreg
E:\mem\nvtest_tk1>nvhost.exe --avp --sdram PM358_Micron_MID_2GB_MT41K256M16HA_792MHz.cfg --skip-reset --chip t124 wfblit_lite.axf -- -fc 1,50,0 -fh 150 -vic 300 -reg 1
nvhost: ========================================
nvhost: Found --chip parameter
nvhost: ...success! Found t124
nvhost: ========================================
nvblserver: Loading "wfblit_lite.axg" via usb:...
Done.
WARNING: Ignoring auto-detect due to --chip parameter
...Now connected to target using usb
target_stdout: enter NvTestMain V01
target_stdout: Processing argument 1: -fc
target_stdout: Processing argument 3: -fh
target_stdout: Processing argument 5: -vic
target_stdout: -vic 300
target_stdout: Processing argument 7: -reg
target_stdout: The number of pattern: 16, box num 30
target_stdout: box width/height 2048 128 Surface width/height: 2048 3840
target_stdout: init sdram
target_stdout: Memory size = 0x00000400
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM test PASSED
target_stdout: Register Engine
target_stdout: Find Engine id: 0x5d
target_stdout: search id: 0x5e
target_stdout: search id: 0x5d
target_stdout: Engine ID: 0x5d found
target_stdout:
target_stdout:
target_stdout: -------Start: sanity in Register based mode
target_stdout: Board: E1186
target_stdout: top 0xfffffffe
target_stdout: initBLit
target_stdout: Init Vic Frequency Ctrl
target_stdout: Setting PLLC (600MHz). VIC (300MHz), AVP (150MHz), Host1x (150MHz)
target_stdout: SOURCE_VIC reg: 0x20000002 VIC source: PLLC_OUT0
target_stdout: ENB X reg: 0x01040000 vic clock: enable
target_stdout: SOURCE_HOST1X reg: 0x40000006 HOST1X source: PLLC_OUT0
target_stdout: ENB L reg: 0x90409130 host1x clock: enable
target_stdout: AllocSyncpt
target_stdout: channe base:0x50000000 sync base:0x2100, syncpt0 base:0xf80
target_stdout: prep surface
target_stdout: DRAM addr range: 0x80000000 - 0xfffffffe
target_stdout: DRAM footprint: 0x80000000 - 0x81e00000 (wfblit)
target_stdout: DRAM used: 30.0MB (blit uses 30.0MB)
target_stdout: Blit Start Addr: 0x80000000, Medium loops: 0x1
target_stdout: == Range 0 in 1: 0x80000000 - 0x81dfffff
target_stdout: wfblitcore
target_stdout: Patterns loaded. starting blits.
target_stdout: PMC aperture space
target_stdout: PMC_PLLP_WB0_OVERRIDE reg: 0x00000422
target_stdout: PLLM_WB0_OVERRIDE_FREQ reg: 0x0000010c
target_stdout: PMC:PLLP: override: disable
target_stdout: PMC:PLLM: override: disable (12,1)
target_stdout:
target_stdout: CAR aperture space
target_stdout: PLLM: 792MHz(1,66,0), PLL_BASE: 0x4c004201,
target_stdout: PLLP: override: disable
target_stdout: PLLP: 408MHz(12,1,0), PLL_BASE: 0x4800010c,
target_stdout: PLLC: 600MHz(1,50,0), PLL_BASE: 0x48003201,
target_stdout: EMC source clk: PLLM_UD, SOURCE_EMC: 0x80000000
target_stdout: (ref=12MHz)
target_stdout: EMC freq: 792MHz
target_stdout: start box. loops: 0x10 numbox: 30
target_stdout: end box
target_stdout: Programming done. Waiting test done.
target_stdout: ----------------------
target_stdout: T124 Memory Statistics
target_stdout: ----------------------
target_stdout: Stats (
target_stdout:
target_stdout: Channel 0:
target_stdout: DEV 0:
target_stdout: .RD (
target_stdout: .RD8 (
target_stdout: .WR (
target_stdout: .WR8 (
target_stdout: .ACT (
target_stdout: .REF (
target_stdout: .SREF (
target_stdout: .E1CA (
target_stdout: .E1SA (
target_stdout: .E0CA (
target_stdout: .E0SA (
target_stdout: .E1CN (
target_stdout: .E1SN (
target_stdout: .E0CN (
target_stdout: .E0SN (
target_stdout:
target_stdout: DEV 1:
target_stdout: .RD (
target_stdout: .RD8 (
target_stdout: .WR (
target_stdout: .WR8 (
target_stdout: .ACT (
target_stdout: .REF (
target_stdout: .SREF (
target_stdout: .E1CA (
target_stdout: .E1SA (
target_stdout: .E0CA (
target_stdout: .E0SA (
target_stdout: .E1CN (
target_stdout: .E1SN (
target_stdout: .E0CN (
target_stdout: .E0SN (
target_stdout:
target_stdout: Channel 0 Bandwidth(avg): 3453MB/s, or 54% (assuming static 792MHz)
target_stdout: =====================
target_stdout: End Memory Statistics
target_stdout: =====================
target_stdout: Blit done. The blit took 3.2 seconds
target_stdout: Read back check. Mask = 0xffffffff
target_stdout: wfblitcore done!
target_stdout: ------- End: sanity in Register based mode
target_stdout: [pass: SubtestWfblit]
target_stdout: ---------------
target_stdout: total subtests: 1
target_stdout: total failures: 0
target_stdout:
target_exit(0)
nvhost: QUIT
E:\mem\nvtest_tk1>pause
Press any key to continue . . .
runmats
E:\mem\nvtest_tk1>nvhost.exe --avp --sdram PM358_Micron_MID_2GB_MT41K256M16HA_792MHz.cfg --skip-reset --chip t124 mats.axf
nvhost: ========================================
nvhost: Found --chip parameter
nvhost: ...success! Found t124
nvhost: ========================================
nvblserver: Loading "mats.axg" via usb:...
Done.
WARNING: Ignoring auto-detect due to --chip parameter
...Now connected to target using usb
target_stdout: Initializing SDRAM controller.
target_stdout: Init PLLM: M=1, N=66, P=0, Misc1=1879048192, Misc2=0,StableTime=23913795
target_stdout: Memory size = 0x00000400
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM test PASSED
target_stdout: SDRAM size: 2047 MB (0x7ff00000)
target_stdout: [pass: SubtestInitSdramController]
target_stdout: Memory size: 0x7ff00000
target_stdout: [pass: SubtestCheckPatLength]
target_stdout: Beginning AddressOnData Test.
target_stdout: Memory_AddressOnDataTest start
target_stdout: Writing test range 0 (0x80000040 - 0xbff80000)
target_stdout: Writing test range 1 (0xbff80000 - 0xfff00000)
target_stdout: Verifying range 0 (0x80000040 - 0xbff80000)
target_stdout: Verifying range 1 (0xbff80000 - 0xfff00000)
target_stdout: Memory_AddressOnDataTest end
target_stdout: [pass: SubtestAddressOnData]
target_stdout: ---------------
target_stdout: total subtests: 3
target_stdout: total failures: 0
target_stdout:
target_exit(0)
nvhost: QUIT
E:\mem\nvtest_tk1>pause
Press any key to continue . . .
The EMMC and SDRAM read/write are pass.
Do you have Jetson board to confirm your firmware is good ?
Just test the firmware (which is L4T 21.4 stock kernel and filesystem) with a jetson board and it works fine.
Is it the USB stability issue ? Would you try another USB cable and check the USB connection on board ?
Is it fail at same log with different BCT ?
Hello. Just solved it. I uncomment the board-id in the conf file and it worked.
Do you know what this board id does? What value should I set it to ?
Oh, that’s more important i forgot to mention
Thanks for your update…
Reference design use the board ID eeprom to config different board.
User should config it manually if don’t have eeprom on board or the content is empty
The ID eeprom just for this. it is not needed if you have config it in U-boot.
i will give the update about the setting later.
For Jetson TK1,
Common for u-boot and fastboot: Customer should update the file jetson-tk1.conf by passing BOARDID=“0x177 0x00 0x05” or a number of their choice
Additionally, customer using default bootloader as u-boot:
Default boardid is hardcoded in file jetson-tk1_extlinux.conf.xxxx. to be passed in kernel command line. Customer should not do anything and just keep using the same ID in kernel if they want to add some new feature/code…
If customer wants to change the board id altogether, then they have the edit the above said file along with adding support for that board id in kernel
thank you. you have been very helpful
If I enter my custom board id in the .conf file, the flashing fails because of an “unknown board id”. If I fake a valid board id, it fails on pmu board id, which I have noe idea where it gets.
I am running tools the Tegra_K1_Memory_CharacterizationV1.0.1 on Jetson k1 board, able to generate the DVFS file.
How to integrate the generated DVFS file into the Linux kernel, any inputs?