Approved memory list/document

Hi, I would like to get the latest approved vendor list regarding the memory devices for the Tegra K1. I have old revision 3/28May2014 and it only includes some DDR3L memories. Any update available which would include list of the tested/approved DDR3L + LPDDR3 + eMMC devices?

There are very long list for e.MMC and the part is from Sandisk,SK Hynix,Toshiba and Samsung, Just make sure it support 4.5/4.5.1 or 5.0 spec.
Jetson TK1 remove the LPDDR3 support.
For the DDR3L: Sk Hynix H5TC4G63AFR-RDA and Micron MT41K256M16HA-125 are suggested

Hi, we are making own hardware and I have understood from memory vendors that also LPDDR3 is verified on some Tegra K1 versions. I would need to know which ones are.

Also, I need complete list of approved DDR3L devices, not only the suggested. I would like to find the best possible solution for long leadtime and certain specific requirements. Could you please provide a complete list. thanks!

There are a lot of work to do for memory tuning. It is difficult to complete without direct support.
It was asked follow reference design for the critical part. such as PMIC and Memory.
The following memory were listed in the latest AVL list released on 2014/5/28
Elpida EDJ4216EFBG-GN-F
Elpida EDJ8416E6MB-GNL-F
Kisgston D2516EC4BXGGB
Micron MT41K256M16HA-125-E
Micron MT41K512M16TNA-125-E
SK Hynix H5TC4G63AFR-PBA
SK Hynix H5TC4G63AFR-RDA
SK Hynix H5TC8G63AMR-PBA

Micron MT41K256M16HA-125-E will be replaced with new 20nm process version MT41K256M16TW-107.
Hynix H5TC4G63AFR-RDA will be also replaced with new version H5TC4G63CFR-RDA.

Are these new versions approved and ok to use?

The risk is low if only process change. The memory vendor always refresh the chip with process update and end of the life of old chip.

Hi,
Is there any header/ID fields on the SW which would prevent usage of other versions of DDR3L memories than the ones which are mentioned on the approved memories list?

We plan to use industrial versions of Micron or Hynix and those industrial versions are not on the approved memory list. Functionality, timing and pinout are identical so from technical perspective there is no problems. Or are below industrial versions already verified/approved on the platform?

Hynix industrial : H5TC4G63CFR-RDI
Micron industrial : MT41K256M16TW-107 IT:P

Hynix consumer : H5TC4G63CFR-RDA
Micron consumer : MT41K256M16TW-107:P

No limitation on hardware design or software…
These two industrial memory chip have been verified on JTK1
The BCT(boot cfg) and DVFS table need update for new memory part.

Hi
Could you provide both BCT and DVFS tables for us? We are using Linux for Tegra R21.4 version.
Thanks!

Which memory files are you want ? H5TC4G63CFR-RDI or MT41K256M16TW-107 IT:P ?

Hi edli1983,

Since we custom board DRAM part is using MT41K256M16TW-107 IT:P, L4T version is R21.4.
We have same request, could you provide BCT tables for us too?

Other question, have some test program can verify the DRAM is stable in run time ?

Thank you very much.

vic.lin920@gmail.com

Hi viclin920,

You can refer to this topic [url]https://devtalk.nvidia.com/default/topic/929617/tegra-k1-recommended-ram/[/url]

Hi Trumany,

Thank you for your reply.
I already checked it. However, the step of generating config a bit complicated.
I am not sure that config is correct or not if generate by myself.
So if there are places available for download or you can send me ?

Thank you.

DDR config files are generated based on DDR chips and boards, different board different config. Also the config should be used to run shmoo test to verify and optimize, otherwise it could cause high potential risk of system halt/crash. So you’d better to generate your own config and test them with shmoo.

Hi Trumany.
I also have a custom board. The design was copied from Jetson KT1 board. But we can not find a the same RAM chip, so we used a SK Hynix H5TC4G63AFR-PBA.
Can you share BCT config file to this chip?
My e-mail: taraskornuta@gmail.com
Thanks

You need to generate its BCT as AppNote said in shmoo package, it should be based on parameters of H5TC4G63AFR-PBA. And run shmoo test to optimize it and so generate DVFS table.