USB 3 and custom board

Hello,

We have built a custom board which is a clone of the jetson and added another usb port which is connected to PEX_USB3_TX1N, PEX_USB3_TX1N, PEX_USB3_RX1N, PEX_USB3_RX1N and USB1_DN, USB1_DP. It works but in USB2 mode. I tried edditing ss_portmap property in the DTS and set it to 0x12 and also tried to 0x2 but still shows up as USB2. The regular usb3 port on the jetson does shows up as usb3 but the new one which we added shows up as usb2. Any help is appreciated.

Hi iaponte,
Do you follow the design guide that place the 0.1uf cap on USB3_TX1_P/N trace?
Also try to remove the filter and ESD protection if they’re stuffed, which may deteriorate the SI depends on the components quality.

Hi,

The port have the cap in place. The port is working properly. What we cannot do is switch it to USB3 because in usb2 works fine. It is more a software issue. We tried modifying the dtb to no avail.

"It is more a software issue. We tried modifying the dtb to no avail. "
Yes, you have to change some software.
Try looking in board-ardbeg.c where it is configures USB for different boards.

Alas, Nvidia have broken the DeviceTree model by embedding board differences back in driver files.

Hi iaponte,

Could you pls share schematic of this part if possilbe? That will be helpful to confirm no hardware risk.

Hello, iaponte:
You can try the following changes and see whether 2 USB SS port can work.

  1. file /boot/extlinux/extlinux.conf, usb_port_owner_info=3 lane_owner_info=6
  2. file kernel/arch/arm/boot/dts/tegra124-jetson_tk1-pm375-000-c00-00.dts, in ‘xusb@7009000’, nvidia,ss_portmap = <0x12>; (NOTE: if you have changed the DTS part for your own board, please change the corresponding code.)
  3. file kernel/arch/arm/mach-tegra/board-ardbeg.c in function ardbeg_xusb_init, the following part code:
    } else if (board_info.board_id == BOARD_PM375) {
    if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB))
    xusb_pdata.portmap &= ~(TEGRA_XUSB_USB2_P0);
    if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB))
    xusb_pdata.portmap &= ~(TEGRA_XUSB_USB2_P2 |
    TEGRA_XUSB_USB2_P1 | TEGRA_XUSB_SS_P0);
    //xusb_pdata.portmap &= ~(TEGRA_XUSB_SS_P1);
    } else {
    /* Ardbeg */
    if (board_info.board_id == BOARD_E1781) {
    pr_info(“Shield ERS-S. 0x%x\n”, board_info.board_id);
    This code ‘xusb_pdata.portmap &= ~(TEGRA_XUSB_SS_P1);’ must be commented out. (NOTE: same as before, if your board changed the board ID, please check the corresponding code.)

br
Chenjian

Could someone share the dts file to enable the USB2.0 host port. On our customized Tegra K1 board, we only managed to get one USB2.0 port working, the 2nd USB2 port doesn’t work, there is no VBUS_EN2 asserted.

Thanks in advance

Dears,
Have someone saw the error message for USB 3:
“tegra-xhci tegra-xhci: SS gated Host ungated. Should not happen”

What could the issue reason?

Best regards,
Fox

Dears,
Could help to check for this design, below configure correct or not?

/boot/extlinux/extlinux.conf:
usb_port_owner_info=2

kernel/arch/arm/boot/dts/tegra124-jetson_tk1-pm375-000-c00-00.dts:
xusb@70090000 {
/* nvidia,uses_external_pmic;
nvidia,gpio_controls_muxed_ss_lanes; /
nvidia,gpio_ss1_sata = <0>;
nvidia,portmap = <0x703>; /
SSP0, SSP1 USB2P0, USB2P1, USBP2 /
nvidia,ss_portmap = <0x12>; /
SSP0 on USB2P2, SSP1 on USB2P1 /
nvidia,lane_owner = <6>; /
USB3P0 USB3P1 /
nvidia,ulpicap = <0>; /
No ulpi support. can we remove */
status = “okay”;
};

/kernel/arch/arm/mach-tegra/board-ardbeg.c
static void ardbeg_xusb_init(void)

} else if (board_info.board_id == BOARD_PM375) {
if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB))
xusb_pdata.portmap &= ~(TEGRA_XUSB_USB2_P0);
if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB))
xusb_pdata.portmap &= ~(TEGRA_XUSB_USB2_P2 |
TEGRA_XUSB_USB2_P1 | TEGRA_XUSB_SS_P0);
// xusb_pdata.portmap &= ~(TEGRA_XUSB_SS_P1);
} else {

Best regards,
Fox

Usb3.0 - customer.jpg

Hi FoxK,

Please refer to below thread for the DTS details about USB SS:

[url]https://devtalk.nvidia.com/default/topic/930810/jetson-tx1/usb-pex-amp-sata-use-case-2-three-usb-3-ports/post/4864089/#4864089[/url]

Thanks

Dear Kay,
The setting could is correct, did you have ever see below message?
“tegra-xhci tegra-xhci: SS gated Host ungated. Should not happen”

What could the issue reason?

Best regards,
Fox

Thanks ,I will try that

Hello, Fox:
Which version of SDK you are using? and what changes you’ve introduced? Please provide full kernel log and your changes.

br
ChenJian

Hello, i have same design ,and i do same changes , then also 2nd USB port connected at SS1 not working.
Is there any other configuration required for this ?