I2C burst write in TX1

Autonomous Machines Jetson & Embedded Systems Jetson TX1
1

Hi,

I have an I2C device which I am communicating with in burst mode. I have a driver which uses the i2c_master_send API to do that. I have tested this driver with the TK1 and it works without any issues.

The device works at 1.8v logic and it is connected to i2c-6 on the Jetson TX1. The command i2cdetect displays the device without any issues.

I am trying the same I2C burst write with the TX1 kernel, but this causes a CPU lockup and the Jetson TX1 stops responding.

BUG: soft lockup - CPU#3 stuck for 21s!

Upon debugging further, I noticed that there are two i2c drivers in the kernel. i2c-tegra.c and i2c-tegra-vi.c

The i2c-dev nodes from 0 to 5 are enumerated by i2c-tegra.c and the other i2c-6 node is enumerated by i2c-tegra-vi.c. I am sure this is intended for use with a camera connected to that bus.

But my question is , does the I2C adapter enumerated by the VI unit support burst write mode?

Normal byte or word read,writes work fine without any issues on the same node using the i2c_transfer API.

2

Also,

The i2cdetect command fails on the adapters i2c-3 and i2c-5 fails with error messages printed on the debug console such as this.

[ 1727.342159] tegra-i2c 7000c700.i2c: --- register dump for debugging ----
[ 1727.349222] tegra-i2c 7000c700.i2c: I2C_CNFG - 0x22c00
[ 1727.354759] tegra-i2c 7000c700.i2c: I2C_PACKET_TRANSFER_STATUS - 0x10001
[ 1727.361944] tegra-i2c 7000c700.i2c: I2C_FIFO_CONTROL - 0xe0
[ 1727.367583] tegra-i2c 7000c700.i2c: I2C_FIFO_STATUS - 0x800080
[ 1727.373433] tegra-i2c 7000c700.i2c: I2C_INT_MASK - 0xed
[ 1727.378662] tegra-i2c 7000c700.i2c: I2C_INT_STATUS - 0x2
[ 1727.383998] tegra-i2c 7000c700.i2c: msg->len - 1
[ 1727.388619] tegra-i2c 7000c700.i2c: is_msg_write - 0
[ 1727.393604] tegra-i2c 7000c700.i2c: buf_remaining - 1
[ 1727.398678] tegra-i2c 7000c700.i2c: i2c transfer timed out, addr 0x0000, data 0x00

The I2C_PACKET_TRANSFER_STATUS denotes that the controller is busy according to the TX1 TRM. I suspect that these two adapters are disabled by default. If so, how do I enable these two adapters and what voltage level do they work in?

3

I tried hooking up the same device to i2c-0. The code (i2c_master_send) does not hang the entire system now and the device works successfully. Seems like a bug in the implementation of i2c-tegra-vi.c to me.

Could somebody from nvidia test and confirm the same?

4

Hello, dilipkumar25:
Let’s clarify i2c issues one by one.

  1. You are right for i2c-vi. That’s a dedicated low latency control for camera support hardware through I2C. So let’s put it aside.
  2. For generic I2C module, there are 6 instances of this controller. I’m a little confused that you said the device attached to I2C-0 works well, but it fails when attached to i2c-3 or i2c-5, right? Can you provide some details about that? Currently in Jetson TX1, HDMI is attached to I2C-3.

br
ChenJian

5

Hi ChenJian,

  1. I need to use the i2c-6 instance for interfacing a camera sensor using burst write commands. So I do not wish to put this aside, as this is quite important part of my requirement. Is burst write supported in this controller? I would use another i2c instance if you confirm that burst write is not possible using i2c-6

  2. If HDMI is attached to i2c-3, then I’m sure this i2c instance is initialized somewhere in the HDMI driver. Because by default after booting the board, if I run the command “sudo i2cdetect -r -y -a 3” I get errors as I mentioned earlier.

I’m not interested in i2c-3 or 5 right now. I haven’t tried interfacing my device with i2c-3 or 5. I only tested it with i2c-0 and 6. And my device works perfectly fine with i2c-0.

6

This comment is present in drivers/media/platform/tegra/regmap_util.c

/* bug 200048392 -
   the vi i2c cannot take a FIFO buffer bigger than 16 bytes */

Is this related to the issue that I am facing?