HI All!!!
I wonder about the TX1 MIPI DSI.
I was turn on the MIPI LCD of QHD(2560x1600).
But I want to turn on the LCD to use the MIPI DSC(Display Stream Compression).
In the Kernel Source not find the information related to the MIPI DSC.
Please let me know if you have any information.
Thanks!!!
Hello bedguy, thanks for your inquiry, but DSI Display Stream Compression is not supported on the Jetson TX1.
I’m working on jetson TX1 board and have to get a screen working using MIPI DSI. We were able to get the display on the screen with a HDMI cable. Now, we have to get a display for DSI. We have enabled DSI related configurations in the kernel, but still no success. We looked at various forums pertaining to TK1 and TX1, but none of them mention about the procedure on how to enable DSI in the software.
Can anyone help me out in this regard ?
Thanks
Hello,
DSI has already been enabled in released BSP.
You can refer to driver code in kernel arch/arm64/mach-tegra/.
You need to add a panel driver, with correct configurations.
For DTB part, please refer to tegra210-jetson-cv-base-p2597-2180-a00.dtb
(Default DTB is p2371-2180-devkit for your board, which has no DSI panel support.)
br
ChenJian
Hi ChenJian,
Thanks for your reply. But we are using tegra210-jetson-cv-base-p2597-2180-a00.dtb as the DTB file. panel-a-wuxga-8-0.dtsi is being included in the p2597-2180-a00.dts file. Do you mean to say that we need to update panel-a-wuxga-8-0.dtsi file with the correct configurations ?
Thanks
Hello, Prd_umm:
you can refer to panel-a-wuxga-8-0.dtsi. But you need change the parameters according to the panel you are using.
br
Chenjian
Is panel-a-wuxga-8-0.dtsi related to DSI in TX1 ? There are other dtsi files which are related to panel configurations like panel-s-wqxga-10-1.dtsi, panel-c-wxga-14-0.dtsi, etc. So, I’m not sure which dtsi file to update.
How to identify which dtsi file to update according to the panel which I’m using ?
Thanks
Hello, Prd_umm:
Please check the DTS code, some items with ‘status = “disabled”;’ and some others ‘status = “okay”;’.
You can make your own panel config and add to DTB. With different platform, just use different DTB for different hardware.
br
Chenjian
Hi ChenJian,
We have our own dtb file where in we include tegra210-jetson-cv-base-p2597-2180-a00.dts. Do we have to enable clock for DSI through software?
Thanks
Hello,
that clock should be enabled by correct board config.
you can check /sys/kernel/debug/clock/clock_tree for details.
With correct config, ‘dsia’ will be ‘on’ after system up.
br
ChenJian
Hi ChenJian,
This is how the clock_tree file looks like at present. All the configurations related to DSI are off.
clock state ref div rate (shared req / bw_margin / iso_margin)
------------------------------------------------------------------------------------------------------------------
vimclk_sync on 1 24000000
i2s4_sync on 1 24000000
i2s3_sync on 1 24000000
*audio3 off 0 24000000
i2s2_sync on 1 24000000
i2s1_sync on 1 24000000
*audio1 off 0 24000000
i2s0_sync on 1 24000000
spdif_in_sync on 1 24000000
*audio2_dmic off 0 24000000
*audio1_dmic off 0 24000000
*audio0_dmic off 0 24000000
*audio off 0 24000000
*audio_2x off 0 x2 48000000
*audio4 off 0 24000000
*audio2 off 0 24000000
*audio0 off 0 24000000
sata_uphy on 1 0
xusb_padctl on 1 0
pex_uphy on 1 0
dfll_cpu on 1 1734000000
cclk_g on 1 1.0 1734000000
cpu_g $ on 1 1734000000
vdd_cpu 1168 mV
cpu $ on 2 1734000000
osc on 4 38400000
usb2_hsic_trk off 0 4.0 9600000
usb2_trk off 0 1.0 9600000
*hsic_trk off 0 1.0 9600000
gpu_gate on 1 38400000
xusb_gate on 1 38400000
pll_mb off 0 x20.8.. 800000000
pll_m on 1 x41.6.. 1600000000
emc $ on 10 1.0 1600000000
vdd_core 887 mV
xusb.emc $ on 1 1600000000 (32000000 / 40000000+)
pcie.emc $ off 0 1600000000 (102000000)
ape.emc $ off 0 1600000000 (1600000000)
battery.emc $ on 1 1600000000 (1600000000^)
vic_shared.emc $ off 0 1600000000 (0 / 0+)
vic.emc $ off 0 1600000000 (204000000)
override.emc $ off 0 1600000000 (1600000000)
floor.emc $ off 0 1600000000 (1600000000)
iso.emc $ on 1 1600000000 (150060000)
camera.emc $ off 0 1600000000 (1600000000 / 2000000000+)
ispb.emc $ off 0 1600000000 (0 / 0 / 0+)
ispa.emc $ off 0 1600000000 (0 / 0 / 0+)
vi.emc $ off 0 1600000000 (1600000000 / 2000000000 / 3555555500+)
tsecb.emc $ off 0 1600000000 (204000000)
tsec.emc $ off 0 1600000000 (204000000)
nvdec.emc $ off 0 1600000000 (102000000)
nvjpg.emc $ off 0 1600000000 (204000000 / 255000000+)
msenc.emc $ off 0 1600000000 (204000000 / 255000000+)
3d.emc $ on 1 1600000000 (68000000)
cap.throttle.emc $ on 1 1600000000 (1600000000^)
cap.vcore.emc $ on 1 1600000000 (1600000000^)
cap.emc $ on 1 1600000000 (1600000000^)
mon.emc $ on 2 1600000000 (28588000)
sdmmc4.emc $ off 0 1600000000 (150000000)
sdmmc3.emc $ off 0 1600000000 (1600000000)
usb2.emc $ off 0 1600000000 (1600000000)
usb1.emc $ off 0 1600000000 (1600000000)
usbd.emc $ off 0 1600000000 (12750000)
disp2.la.emc $ on 1 1600000000 (40800000)
disp1.la.emc $ off 0 1600000000 (1600000000)
disp2.emc $ on 1 1600000000 (150060000 / 187575000 / 333466600+)
disp1.emc $ off 0 1600000000 (1600000000 / 2000000000 / 3555555500+)
cpu.emc $ on 1 1600000000 (1600000000)
avp.emc $ off 0 1600000000 (1600000000)
mc $ on 6 2.0 800000000 (0)
mc_cdpa $ on 1 1.0 800000000
mc_ccpa $ on 1 1.0 800000000
mc_cpu $ on 1 1.0 800000000
mc_cbpa $ on 1 1.0 800000000
mc_capa $ on 1 1.0 800000000
mc_bbc $ on 1 1.0 800000000
pll_ref on 6 1.0 38400000
gpu_ref on 3 38400000
gbus $ on 1 x2 76800000
vdd_gpu 820 mV
floor.profile.gbus $ off 0 76800000 (998400000)
floor.gbus $ off 0 76800000 (998400000)
override.gbus $ off 0 76800000 (998400000)
cap.profile.gbus $ on 1 76800000 (998400000^)
cap.throttle.gbus $ on 1 76800000 (998400000^)
cap.vgpu.gbus $ on 1 76800000 (998400000^)
battery.gbus $ on 1 76800000 (998400000^)
edp.gbus $ on 1 76800000 (998400000^)
cap.gbus $ on 1 76800000 (998400000^)
gm20b.gbus $ on 1 76800000 (76800000)
pll_e on 1 x2.6.. 100000000
pciex $ off 0 x2.5 250000000
vdd_core 0 mV
cml1 off 0 100000000
cml0 off 0 100000000
*plle_gate off 0 100000000
pll_re_vco on 1 x16.2.. 624000000
*pll_re_out1 off 0 1.0 624000000
pll_re_out on 1 1.0 624000000
xusb_falcon_src $ on 2 2.0 312000000
vdd_core 850 mV
pll_dp off 0 x7.0.. 270000000
*sor0_brick off 0 1.0 270000000
pll_c4 off 0 x26 998400000
pll_c4_out2 off 0 5.0 199680000
sdmmc4 $ off 0 1.0 199680000
vdd_core 0 mV
*pll_c4_out1 off 0 3.0 332800000
pll_c4_out0 off 0 1.0 998400000
pll_c4_out3 off 0 1.0 998400000
pll_d2 on 2 x1.9.. 74250000
disp2 on 1 1.0 74250000
vdd_core 800 mV
*disp2_slcg_ovr off 0 74250000
sor1_src on 1 1.0 74250000
sor1_brick on 1 1.0 74250000
sor1 $ on 1 1.0 74250000
vdd_core 800 mV
pll_x off 0 x16 614400000
pll_u on 3 x12.5 480000000
pll_u_480M on 1 1.0 480000000
xusb_ss_src on 2 4.0 120000000
xusb_ssp_src $ on 1 1.0 120000000
vdd_core 850 mV
xusb_ss $ on 1 1.0 120000000
xusb_hs_src $ on 1 1.0 120000000
vdd_core 850 mV
*xusb_ss_div2 off 0 2.0 60000000
pll_u_out on 3 2.0 240000000
pll_u_out2 on 1 4.0 60000000
*pll_u_60M off 0 1.0 60000000
pll_u_out1 on 2 5.0 48000000
pll_u_48M on 1 1.0 48000000
xusb_fs_src $ on 1 1.0 48000000
vdd_core 850 mV
pll_d off 0 x5 192000000
pll_d_out0 off 0 2.0 96000000
csi off 0 1.0 96000000
*dsib $ off 0 1.0 96000000
vdd_core 0 mV
*dsia $ off 0 1.0 96000000
vdd_core 0 mV
pll_a off 0 x3.3.. 128000000
pll_a_out0 off 0 5.50 23272728
d_audio $ off 0 2.0 11636364
vdd_core 0 mV
d_audio_slcg_ovr $ off 0 11636364
dmic3 off 0 11.0 2115703
dmic2 off 0 11.0 2115703
dmic1 off 0 11.0 2115703
spdif_out $ off 0 21.0 1108226
vdd_core 0 mV
i2s4 off 0 5.50 4231405
i2s3 off 0 5.50 4231405
i2s1 off 0 5.50 4231405
i2s0 off 0 10.50 2216451
*pll_a_out0_out_adsp off 0 1.0 23272728
*pll_a_out_adsp off 0 1.0 128000000
pll_p on 17 x10.6.. 408000000
tsec $ off 0 1.0 408000000
vdd_core 0 mV
*tsec_skip $ on 0 1.0 408000000
soc_therm on 1 8.0 51000000
cl_dvfs_soc on 3 8.0 51000000
cl_dvfs_ref on 2 8.0 51000000
extern3 off 0 10.0 40800000
*clk_out_3 off 0 1.0 40800000
mclk3 off 0 40800000
extern2 off 0 10.0 40800000
*clk_out_2 off 0 1.0 40800000
uart_mipi_cal off 0 6.0 68000000
cam-mipi-cal off 0 68000000
cile off 0 4.0 102000000
cilcd off 0 4.0 102000000
cilab off 0 4.0 102000000
dpaux1 off 0 17.0 24000000
*dpaux off 0 17.0 24000000
*vi_sensor2 off 0 3.0 136000000
mclk2 off 0 136000000
*vi_sensor off 0 3.0 136000000
mclk off 0 136000000
uartd off 0 1.0 408000000
uartc off 0 1.0 408000000
uartb off 0 1.0 408000000
uarta on 2 1.0 408000000
vii2c off 0 3.0 136000000
i2c5 off 0 3.0 136000000
i2c4 off 0 20.0 20400000
i2c3 off 0 5.0 81600000
i2c2 on 1 5.0 81600000
i2c1 off 0 5.0 81600000
csite off 0 1.0 408000000
sdmmc_legacy off 0 34.0 12000000
*sdmmc4_ddr off 0 9.0 45333334
sdmmc2_ddr off 0 9.0 45333334
sdmmc2 $ off 0 2.0 204000000
vdd_core 0 mV
sdmmc3_ddr off 0 9.0 45333334
*sdmmc1_ddr off 0 9.0 45333334
sdmmc3 $ off 0 9.0 45333334
vdd_core 0 mV
sdmmc1 $ off 0 4.0 102000000
vdd_core 0 mV
sata_oob $ off 0 2.0 204000000
vdd_core 0 mV
sbc4 $ off 0 17.0 24000000
vdd_core 0 mV
sbc3 $ off 0 17.0 24000000
vdd_core 0 mV
sbc2 $ off 0 17.0 24000000
vdd_core 0 mV
sbc1 $ off 0 17.0 24000000
vdd_core 0 mV
qspi $ off 0 4.0 102000000
vdd_core 0 mV
hda on 2 8.0 51000000
pwm on 2 8.50 48000000
*spdif_in off 0 8.50 48000000
hda2codec_2x on 3 8.50 48000000
hda2hdmi on 2 1.0 48000000
sata $ off 0 4.0 102000000
vdd_core 0 mV
*sata_slcg_ovr $ off 0 102000000
*sata_slcg_ovr_ipfs $ off 0 102000000
*sata_slcg_ovr_fpci $ off 0 102000000
sata_aux $ off 0 102000000
ape $ off 0 16.0 25500000
vdd_core 0 mV
ape_slcg_ovr $ off 0 25500000 (0)
override.ape $ off 0 25500000 (408000000)
cap.vcore.ape $ on 1 25500000 (408000000^)
xbar.ape $ off 0 25500000 (25500000)
adsp.ape $ off 0 25500000 (25500000)
adma.ape $ off 0 25500000 (25500000)
mselect $ on 2 4.0 102000000
vdd_core 800 mV
override.mselect $ off 0 102000000 (408000000)
cap.vcore.mselect $ on 1 102000000 (408000000^)
pcie.mselect $ off 0 102000000 (204000000)
cpu.mselect $ on 1 102000000 (102000000)
host1x $ on 1 5.0 81600000
vdd_core 800 mV
override.host1x $ off 0 81600000 (408000000)
floor.host1x $ off 0 81600000 (408000000)
cap.vcore.host1x $ on 1 81600000 (408000000^)
cap.host1x $ on 1 81600000 (408000000^)
vii2c.host1x $ off 0 81600000 (408000000)
vi.host1x $ off 0 81600000 (408000000)
nv.host1x $ on 1 81600000 (81000000)
sclk_mux on 2 408000000
sclk_div on 2 3.0 136000000
sclk on 3 11.13 12218750
sbus $ on 2 12218750
vdd_core 800 mV
override.sclk $ off 0 12218750 (408000000)
floor.sclk $ off 0 12218750 (408000000)
cap.throttle.sclk $ on 1 12218750 (408000000^)
cap.vcore.sclk $ on 1 12218750 (408000000^)
cap.sclk $ on 1 12218750 (408000000^)
mon.avp $ on 1 12218750 (12000000)
camera.sclk $ off 0 12218750 (408000000)
wake.sclk $ off 0 12218750 (408000000)
avp.sclk $ off 0 12218750 (408000000)
ahb.sclk $ on 1 1.0 12218750 (12000000)
sdmmc4.sclk $ off 0 12218750 (115000000)
usb2.sclk $ off 0 12218750 (408000000)
usb1.sclk $ off 0 12218750 (408000000)
usbd.sclk $ off 0 12218750 (80000000)
apb.sclk $ on 1 1.0 12218750 (12000000)
wifi.sclk $ off 0 12218750 (408000000)
boot.apb.sclk $ off 0 12218750 (136000000)
qspi.sclk $ off 0 12218750 (408000000)
sbc4.sclk $ off 0 12218750 (40000000)
sbc3.sclk $ off 0 12218750 (40000000)
sbc2.sclk $ off 0 12218750 (40000000)
sbc1.sclk $ off 0 12218750 (40000000)
cop on 2 12218750
hclk on 2 1.0 12218750
pclk on 1 1.0 12218750
sor_safe on 7 17.0 24000000
*sor0 $ off 0 1.0 24000000
vdd_core 0 mV
pll_p_out5 on 2 2.0 204000000
pll_p_out3 on 1 4.0 102000000
*dsi2-fixed off 0 1.0 102000000
*dsi1-fixed off 0 1.0 102000000
pll_p_out2 off 0 2.0 204000000
pll_p_out_hsio on 1 408000000
pll_p_out_xusb on 1 408000000
xusb_dev_src $ off 0 4.0 102000000
vdd_core 0 mV
xusb_dev $ off 0 1.0 102000000
xusb_dev_slcg_ovr $ off 0 102000000
xusb_host_src $ on 2 4.0 102000000
vdd_core 850 mV
xusb_host $ on 1 1.0 102000000
xusb_host_slcg_ovr $ off 0 102000000
pll_p_out_cpu on 1 1.0 408000000
pll_p_out4 on 1 2.0 204000000
*pll_p_out_adsp off 0 1.0 408000000
pll_a1 off 0 x15.5 595200000
adsp off 0 1.0 595200000
adsp_slcg_ovr off 0 595200000
adsp_bus $ off 0 595200000
vdd_core 0 mV
override.abus $ off 0 595200000 (844800000)
cap.vcore.abus $ on 1 595200000 (844800000^)
adsp_cpu.abus $ off 0 595200000 (600000000)
pll_c3 off 0 x7 268800000
nvdec $ off 0 1.0 268800000
vdd_core 0 mV
*nvdec_slcg_ovr $ off 0 268800000
*nvdec_skip $ on 0 1.0 268800000
msenc $ off 0 1.0 268800000
vdd_core 0 mV
*msenc_slcg_ovr $ off 0 268800000
*msenc_skip $ on 0 1.0 268800000
c3bus $ off 0 1.0 268800000
vdd_core 0 mV
override.c3bus $ off 0 268800000 (1000000000)
floor.c3bus $ off 0 268800000 (1000000000)
cap.throttle.c3bus $ on 1 268800000 (1000000000^)
cap.vcore.c3bus $ on 1 268800000 (1000000000^)
cap.c3bus $ on 1 268800000 (1000000000^)
nvdec.cbus $ off 0 1.0 268800000 (716800000)
msenc.cbus $ off 0 1.0 268800000 (716800000)
pll_c2 off 0 x5 192000000
tsecb $ off 0 1.0 192000000
vdd_core 0 mV
*tsecb_skip $ on 0 1.0 192000000
se $ off 0 1.0 192000000
vdd_core 0 mV
*se_skip $ on 0 1.0 192000000
nvjpg $ off 0 1.0 192000000
vdd_core 0 mV
*nvjpg_slcg_ovr $ off 0 192000000
*nvjpg_skip $ on 0 1.0 192000000
vic03 $ off 0 1.0 192000000
vdd_core 0 mV
vic03_slcg_ovr $ off 0 192000000
*vic03_skip $ on 0 1.0 192000000
c2bus $ off 0 1.0 192000000
vdd_core 0 mV
vic_floor.cbus $ off 0 192000000 (192000000)
edp.c2bus $ on 1 192000000 (1000000000^)
override.c2bus $ off 0 192000000 (1000000000)
floor.c2bus $ off 0 192000000 (1000000000)
cap.throttle.c2bus $ on 1 192000000 (1000000000^)
cap.vcore.c2bus $ on 1 192000000 (1000000000^)
cap.c2bus $ on 1 192000000 (1000000000^)
tsecb.cbus $ off 0 1.0 192000000 (627200000)
se.cbus $ off 0 1.0 192000000 (627200000)
nvjpg.cbus $ off 0 1.0 192000000 (627200000)
vic03.cbus $ off 0 1.0 192000000 (192000000)
pll_c off 0 x7 268800000
vi $ off 0 1.0 268800000
vdd_core 0 mV
*vi_slcg_ovr $ off 0 268800000
*vi_skip $ on 0 1.0 268800000
cbus $ off 0 1.0 268800000
vdd_core 0 mV
cap.vcore.cbus $ on 1 268800000 (1000000000^)
override.cbus $ off 0 268800000 (1000000000)
isp.cbus $ off 0 1.0 268800000 (268800000)
ispb.isp.cbus $ off 0 1.0 268800000 (793600000)
ispa.isp.cbus $ off 0 1.0 268800000 (793600000)
vi.cbus $ off 0 1.0 268800000 (793600000)
isp $ off 0 1.0 268800000
vdd_core 0 mV
ispb $ off 0 1.0 268800000
*ispb_slcg_ovr $ off 0 268800000
*ispb_skip $ on 0 1.0 268800000
ispa $ off 0 1.0 268800000
*ispa_slcg_ovr $ off 0 268800000
*ispa_skip $ on 0 1.0 268800000
*pll_c_out1 off 0 3.0 89600000
clk_m on 9 2.0 19200000
*dp2 off 0 1.0 19200000
afi off 0 1.0 19200000
pcie off 0 1.0 19200000
extern1 on 3 1.0 19200000
clk_out_1 on 2 1.0 19200000
actmon on 2 1.0 19200000
tsensor on 1 48.0 400000
dbgapb on 1 2.0 9600000
*entropy off 0 1.0 19200000
*dsiblp off 0 2.0 9600000
*dsialp off 0 2.0 9600000
*vim2_clk off 0 1.0 19200000
*csus off 0 1.0 19200000
*usb2 off 0 1.0 19200000
usbd on 1 1.0 19200000
*disp1 off 0 1.0 19200000
vdd_core 0 mV
*disp1_slcg_ovr off 0 19200000
*dtv off 0 1.0 19200000
uartape off 0 125.0 153600
*mipi-cal off 0 1.0 19200000
*mipibif off 0 2.0 9600000
*i2cslow off 0 19.50 984616
i2c6 off 0 1.0 19200000
*owr off 0 2.0 9600000
*la off 0 1.0 19200000
*cec off 0 1.0 19200000
*bsev off 0 1.0 19200000
*vcp off 0 1.0 19200000
*sata_cold off 0 1.0 19200000
*maud off 0 2.0 9600000
apb2ape off 0 1.0 19200000
i2s2 off 0 2.0 9600000
fuse_burn off 0 1.0 19200000
fuse on 1 1.0 19200000
kfuse on 1 1.0 19200000
*iqc2 off 0 1.0 19200000
*iqc1 off 0 1.0 19200000
*axiap off 0 1.0 19200000
*spare1 off 0 1.0 19200000
timer on 1 1.0 19200000
apbdma off 0 1.0 19200000
*ahbdma off 0 1.0 19200000
*cclk_lp off 0 1.0 19200000
*cpu_lp $ off 0 19200000
vdd_cpu 0 mV
*clk_m_div4 on 0 4.0 4800000
*clk_m_div2 on 0 2.0 9600000
clk_32k on 2 32768
rtc on 1 1.0 32768
*blink off 0 393208. 1
I don’t know how to move on from here now. Could you please help me ?
Thanks
Hello, Prd_umm:
To bring-up a panel, please check DTS, panel driver and dsi driver.
You can add some code to debug.
For panel driver, please refer to arch/arm/mach-tegra/panel-xxx.c
For DSI driver, refer to drivers/video/tegra/dc/dsi.c
br
ChenJian
Hi ChenJian,
In arch/arm/mach-tegra/ folder, I am able to see “panel-p-wuxga-10-1.c”. But I couldn’t find any file related to panel-a-wuxga-8-0. So do I need to come up with a new panel-a-wuxga-8-0.c file in arch/arm/mach-tegra/ ? “tegra210-jetson-cv-base-p2597-2180-a00.dts” is including “panel-a-wuxga-8-0.dtsi”.
Thanks
Hello,
To bring-up a new panel, first please confirm hardware is ready.
Then make some changes in software, including DTS and panel driver. Besides, it will be helpful to add some debug code in DSI driver to make sure configuration is correct.
panel-a-wuxga-8-0 is just a reference for your driver development.
For DTS part, there are a lot of documents in internet. You can start from sample code first.
br
ChenJian
Hi guys,
Can you help me on DSI Driver on Tegra K1? I have tried to integrate AUO MIPI LCD B101UAN01.7 into our customized system based on TEGRA K1 CPU. So far we have checked everything around connection to CPU and its schematics. It seems everything is correct. For the LCD, it has ORISE TECH OCT3108B-HV161 MIPI IC and it is different than usual MIPI LCDs. However, I have contacted with the technical team of AUO and they said this lcd passive type of MIPI LCD. There is no need of initiating code and special sequence. I have enabled TK1 DSI configuration on kernel and changed the values in many different ways according to the Technical Reference Manual of TK1. There is no success at all.
I hope that you can tell us what we do wrong.
Thanks,
TD
TulgaD,
The way we usually bring up a panel is to use a low-level standalone code to initialize and set up a common mode for the LCD and draw the boarder for the panel. This is to ensure the panel, board and the interface is working properly. Debugging or probing under this environment is generally simpler. Do you check with AUO and see if they have a board to run this panel? With this in place should help you smooth out the transition to Tegra panel bring-up.
At the same time, we will check on sample DSI panel driver for your reference.
Hello, TulgaD,
Generally, to bring-up a DSI LCD, please check the following list:
In addition, you can also check kernel log and find out whether there’s DC-related error messages.
br
ChenJian
Hello Jachen,
What do you mean by “in board-panel.c, check whether the correct panel configuration is set for corresponding board ID.” where exactly in board-panel.c do i check whether the correct panel is set for the right board ID? How do I find out the board ID that I am using?
Please talk about this more, does a mipi dsi display need an edid?
How does panel-wuxgo… supply a edid?
Format of the edid?
What area of the board-panel.c code requires changes?
Thanks,
Terry