How to design CSI camera ruting for TX1

Autonomous Machines Jetson & Embedded Systems Jetson TX1
1

Hi,

I’m trying to develope a camera module board for JETSON TX1.
On the Jetson TX1 OEM Product DG for MIPI CSI Routing Requirements, the parameter “Max Trace Length/Delay” has become a 1100ps.
However, MIPI CSI trace length of the camera module will exceed 1100ps.
If do not meet this, how far do it be acceptable?
Or, Is there a limit to the delay of the Inter Pair Skew (pair to pair)?

Thanks in advance.

2

Max trace delay is to keep capacitance of lines not exceed limits, otherwise it will affect signal quality.
Max trace delay between DQ & CLK is 5ps.

3

If the received signal quality passes the MIPI RX criteria, is it okay to over the Requirement of trace delay?

Also, is it possible to be received by LVDS with MIPI CSI port of TX1?
For example, Is it possible to receive the LVDS obtained by converting the MIPI signal in the MC20001 of meticom in TX1?

4

It is okay If the signal meets MIPI RX criteria.

You mean transfer LVDS signal to MIPI CSI and then received by TX1? That should be okay.

5

[Update]: The maximum delay should be less than 2 ns. Please refer to this topic: [url]https://devtalk.nvidia.com/default/topic/1020635[/url]