Hi, Is there anyone who know the cache model and their replacement polices for off-chip and on-chip memory in gpu?
L2 Cache: Set-associative ? LRU?
L1 Cache :Set-associative ? LRU?
Texture L1:Set-associative ? LRU?
Constant L1 cache:Set-associative ? LRU?
My current approach is to develope micro-benchmark to reveal such details.
The site hgpu.org is always a good place to check:
Dissecting GPU Memory Hierarchy through Microbenchmarking
thank you, it’s a lot of information for me. unfortunately, searching for gpu internals is like digging for a gold :)
You are miss leading the community!
It is totally wrong! L2 cache is on-chip!! please get a clear definition of on-chip and off-chip!!
and the results in the paper [1509.02308] Dissecting GPU Memory Hierarchy through Microbenchmarking are totally wrong!
Dissecting GPU Memory Hierarchy through Microbenchmarking
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