Integrating with B100 (Toshiba TC358743) HDMI to CSI-2 Bridge

We are attempting to integrate the Auvidea B100 (Toshiba TC358743) HDMI to CSI-2 Bridge with a TK1 (and TX1). So far, we have compiled kernel source from AntMicro to successfully get color bars from one HDMI input device through gstreamer. However, every other input device we’ve tried (laptops, Chromecast, etc.) yields the following kernel messages right before a hard-lock of the entire system:

kernel: [  893.218792] Disabling stream
kernel: [  973.725848] Image is 0x0@0, ~0 Gbps bandwidth (~0MHz/lane)<4>
kernel: [  973.764524] vi vi.0: Failed to create debug                        fs directory
kernel: [  973.964542] vi vi.0: CSI_A syncpt timeout, syncpt = 5149, err = -11
kernel: [  973.973777] TEGRA_CSI_CSI_CIL_A_STATUS 0x00000000
kernel: [  973.979389] TEGRA_CSI_CSI_CILA_STATUS 0x00000000
kernel: [  973.984311] TEGRA_CSI_CSI_CIL_B_STATUS 0x00000000
kernel: [  973.989188] TEGRA_CSI_CSI_CIL_C_STATUS 0x00000000
kernel: [  973.994163] TEGRA_CSI_CSI_CIL_D_STATUS 0x00000000
kernel: [  973.999431] TEGRA_CSI_CSI_CIL_E_STATUS 0x00000000
kernel: [  974.004865] TEGRA_CSI_CSI_PIXEL_PARSER_A_STATUS 0x00000000
kernel: [  974.010618] TEGRA_CSI_CSI_PIXEL_PARSER_B_STATUS 0x00000000
kernel: [  974.016246] TEGRA_VI_CSI_0_ERROR_STATUS 0x00000000
kernel: [  974.021375] TEGRA_VI_CSI_1_ERROR_STATUS 0x00000000
kernel: [  974.226338] vi vi.0: CSI_A syncpt timeout, syncpt = 5150, err = -11
kernel: [  974.240576] TEGRA_CSI_CSI_CIL_A_STATUS 0x00000000
kernel: [  974.246388] TEGRA_CSI_CSI_CILA_STATUS 0x00000000
kernel: [  974.251835] TEGRA_CSI_CSI_CIL_B_STATUS 0x00000000
kernel: [  974.257146] TEGRA_CSI_CSI_CIL_C_STATUS 0x00000000
kernel: [  974.262220] TEGRA_CSI_CSI_CIL_D_STATUS 0x00000000
kernel: [  974.267331] TEGRA_CSI_CSI_CIL_E_STATUS 0x00000000
kernel: [  974.272373] TEGRA_CSI_CSI_PIXEL_PARSER_A_STATUS 0x00000000
kernel: [  974.278121] TEGRA_CSI_CSI_PIXEL_PARSER_B_STATUS 0x00000000
kernel: [  974.284328] TEGRA_VI_CSI_0_ERROR_STATUS 0x00000000
kernel: [  974.289518] TEGRA_VI_CSI_1_ERROR_STATUS 0x00000000
kernel: [  974.494544] vi vi.0: CSI_A syncpt timeout, syncpt = 5151, err = -11
kernel: [  974.503235] TEGRA_CSI_CSI_CIL_A_STATUS 0x00000000
kernel: [  974.508906] TEGRA_CSI_CSI_CILA_STATUS 0x00000000
kernel: [  974.516284] TEGRA_CSI_CSI_CIL_B_STATUS 0x00000000
kernel: [  974.521345] TEGRA_CSI_CSI_CIL_C_STATUS 0x00000000
kernel: [  974.526713] TEGRA_CSI_CSI_CIL_D_STATUS 0x00000000
kernel: [  974.532175] TEGRA_CSI_CSI_CIL_E_STATUS 0x00000000
kernel: [  974.537153] TEGRA_CSI_CSI_PIXEL_PARSER_A_STATUS 0x00000000
kernel: [  974.542910] TEGRA_CSI_CSI_PIXEL_PARSER_B_STATUS 0x00000000
kernel: [  974.548718] TEGRA_VI_CSI_0_ERROR_STATUS 0x00000000
kernel: [  974.553750] TEGRA_VI_CSI_1_ERROR_STATUS 0x00000000

I’ve scoured the Internet and forums for possible leads, but all the CSI ERROR_STATUS messages are 0x00000000 so not much to go on. Any advice would be much appreciated.

I assume tegra didn’t receive any streaming date from bridge until timeout got triggered.
If possible, can you scope the csi lanes to check if any data transmission happen?